Configuration Spartan 3

"luigi" schrieb im Newsbeitrag news: snipped-for-privacy@g14g2000cwa.googlegroups.com...

yes. I know ==> I am anybody am I? :)

there is xilinx AR on this, their suggested solution is to change FPGA MODE pin setting.

similar or even worse happens with S3e and Parallel flash, the configuration from Parallel flash (if located at close to the start address) prohibits the FPGA from being configured over JTAG and as Flash programmer over FPGA JTAG indirect so flash programming also fails.

we have special workaround for this that puts the parallel flash into read id mode and clears FPGA config and then reconfigures FPGA with Flash programming IP and then programs flash.

for Platform flash, you must erase platform flash and force FPGA reconfiguration then it will be possible to reconfigure over JTAG again

Change the mode pins on the FPGA Aurash

typish Xilinx !

for many many PCB boards where mode pins are hard wired under BGA this is not an option.

In all Xilinx documents its clearly written that JTAG configuration over-rides any other modes. Still there are several scenarios where this is not entirely true, eg the restart of non JTAG configurtion if valid signature is present at some time slot will make the JTAG configuration to fail.

I have had that fight many many many times.

Antti

Thanks Antti

This was a very helpful hint. Since I know that this is a Xilinx fault, I can live with. Important is to know, that we don't have a hardware error. We need "master serial mode" and want change constantly the resistors, so we erase the flash.

Luigi

"luigi" schrieb im Newsbeitrag news: snipped-for-privacy@f14g2000cwb.googlegroups.com...

there is special Answer Record that says the 'change mode' if having problems, but I have too few BRAMs overleft to remember the AR numbers.

if in doubt always clean sweep the config memories.

Antti