Regarding NRZ

schrieb im Newsbeitrag news: snipped-for-privacy@WebX.sUNCHnE...

This is not a question of NRZ, ist a quaestion of signaling voltage level.

TTL 0-5V LVTTL 0-3.3V RS232 +/-12V etc.

So the FPGA can only output/input voltage levels stated in the datasheet.

-- Regards Falk

Followup to: By author: "Falk Brunner" In newsgroup: comp.arch.fpga

Well, it sort of is. NRZ is a trivoltage code (which, I have to admit, I have never seen the point of... it seems that MFM or Manchester code is better in every aspect including being self-synchronizing regardless of the bit sequence. Yet NRZ got used in USB. Sigh.)

So the question really is:

"Are there any FPGAs with NRZ-capable I/O buffers?"

The answer to the best of my knowledge is "no", but as you said, look a the data sheets to find what kind of signalling standards your particular FPGA supports.

Obviously, one can always use an external I/O buffer.

-hpa

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Dear Falk & Peter,    Thanks for replying, As Iam basic to this information, Please correct me if iam wromg NRZ coding say it doesn't return to 0v. For transmitting '1' +V is used and for transmitting '0' -V volt is used. we have signalling standards like LVTTL, TTL, CMOS they represent '1' as +V and '0' as 0V What do i say the chip, which provides the NRZ interface,    1) Its signalling varies from +v to -v doesn't return to 0V

   2) Or it has used NRZ coding over Some (say CMOS) signalling standard then one is represented by + Vdd and zero is represented by 0V, am I wright..? 3) what is NRZ, is it not an line coding, i.e how to represent the 1 and 0 across the physical link ? Thanks in Advance

schrieb im Newsbeitrag news: snipped-for-privacy@WebX.sUNCHnE...

if iam wromg

Yes, this is right, BUT it seems you confuse an electrical IO-standard with an logic data encoding scheme.

+V and '0' as 0V

then one is represented by + Vdd and zero is represented by 0V, am I wright..?

Yes, you can easyly use a CMOS IO-buffer for NRZ. As well as for Manchaster, CMI, RZ, NRZI. Again, dont mix up electrical IO-standards with encoding schemes.

across the physical link ?

Yes, NRZ is a line coding (the simples you can imagine). It is absolutely independent on the physical representation. al LOGIC "1" can be 5V, 3.3V,

20mA, +15V etc. where a logic "0" can be 0V, 0mA, -15V etc.

-- Regards Falk

guest wrote: : Dear Falk & Peter, :    Thanks for replying, As Iam basic to this information, : Please correct me if iam wromg NRZ coding say it doesn't return to : 0v. For transmitting '1' +V is used

: and for transmitting '0' -V volt is used. we have signalling standards : like LVTTL, TTL, CMOS they represent '1' as +V and '0' as 0V What do i : say the chip, which provides the NRZ interface,

:    1) Its signalling varies from +v to -v doesn't return to : 0V :    2) Or it has used NRZ coding over Some (say CMOS) : signalling standard then one is represented by + Vdd and zero is represented : by 0V, am I wright..? 3) what is NRZ, is it not an line coding, i.e how : to represent the 1 and 0 across the physical link ? Thanks in Advance

Could you please post in ASCII and not in HTML. Especially as a "guest", please keep to the habits.

Bye

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You need to do some web searches and learn what NRZ really is. First of all, NRZ is not one coding style, but it is several which have one common feature, "the signal does not have to return to zero for each bit". This refers to the way that the two voltage levels are used to indicate if a bit is a 1 or a 0, not what the voltage levels are.

So you can use NRZ with TTL signals of 0 volts and 5 volts or you can use NRZ with RS-232 voltage levels which are +12 volts and -12 volts.

It has been too long since I worked with NRZ and the many variations to explain it without making an error. So you need to do a little digging on your own. Do a search on NRZ and possibly also Manchester and any others that you can think of.

--

Rick "rickman" Collins

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Hello,

NRZ (Non-Return to Zero) has only two signalling levels. NRZI is a non-return to zero code where a 0 is represented by a transition in the signal and a 1 is represented by no transition. Note that the NRZ codes are not inherently self clocking, either an external clock or some method of limiting the number of bit intervals with no transitions is needed. See

Return to Zero (RZ)

often used bipolar + and - voltages for 1 and 0, returning to zero volts between bits (3 level signalling).

Daniel Lang

if iam wromg

and '0' as 0V .

then one is represented by + Vdd and zero is represented by 0V, am I wright..?

across the physical link ?

Followup to: By author: "Daniel Lang" In newsgroup: comp.arch.fpga

My apologies; I was confusing it with AMI (Alternate Mark Inversion).

-hpa

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