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- Sandeep Kulkarni
July 2, 2003, 10:35 am
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Hello,
The synthesis tool is identifying your signal as clock and instantiating a
clock buffer. This has to be loc'ed to a gclkiob.
If you do not want the synthesiser to instantiate clock buffer, in the
synthesis options under the 'Xilinx specific options' tab, specify zero in
the 'number of clock buffer' field. This will prevent the tool to
instantiate clock buffers on its own.
The properties will show this if you have the 'show advanced properties' set
in the preference in the edit menu.
Sandeep
GCLKIOB
the
The synthesis tool is identifying your signal as clock and instantiating a
clock buffer. This has to be loc'ed to a gclkiob.
If you do not want the synthesiser to instantiate clock buffer, in the
synthesis options under the 'Xilinx specific options' tab, specify zero in
the 'number of clock buffer' field. This will prevent the tool to
instantiate clock buffers on its own.
The properties will show this if you have the 'show advanced properties' set
in the preference in the edit menu.
Sandeep
GCLKIOB
the
ERROR:MapLib:93 - Illegal LOC on IPAD symbol "autman" or BUFGP symbol "autman_BUFGP" (output signal=autman_BUFGP), IPAD-IBUFG should only be LOCed to GCLKIOB site.
"autman_BUFGP" (output signal=autman_BUFGP), IPAD-IBUFG should only be LOCed
to GCLKIOB site.
same error
how to solve this problem
i am using 9.1 ver.
Re: ERROR:MapLib:93 - Illegal LOC on IPAD symbol "autman" or BUFGP symbol "autman_BUFGP" (output signal=autman_BUFGP), IPAD-IBUFG should only be LOCed to GCLKIOB site.
snipped-for-privacy@gmail.com wrote:
Global clocks can only be input at specific pins of an FPGA. If you
absolutely MUST use a non-global clock pin, then you need to route
it through the fabric, and the timing will be less well controlled.
Jon
Global clocks can only be input at specific pins of an FPGA. If you
absolutely MUST use a non-global clock pin, then you need to route
it through the fabric, and the timing will be less well controlled.
Jon
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