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- Peter Alfke
August 8, 2003, 5:03 pm

A clock that drives 40 flip-flops should be distributed on a global
clock. Then you do not have to worry about the myriad aspects of clock
skew. Instead you have a delay, but that is a single parameter, and is
much easier to deal with.
Peter Alfke, Xilinx
=========
jean-francois hasson wrote:

clock. Then you do not have to worry about the myriad aspects of clock
skew. Instead you have a delay, but that is a single parameter, and is
much easier to deal with.
Peter Alfke, Xilinx
=========
jean-francois hasson wrote:


Re: Clocking in a virtex 2 without using the clock trees : questions
Unfortunatly, I can not drive a global buffer with this clock because the
maximum delay I get when I go by the global buffer is 8 ns which is
incompatible with the fact that data is synchronous to the falling edge of
the 80 MHz clock. I believe I will try something else with a much faster
clock but just if this information is available what is the maximum skew
provided by the clock tree in a Virtex II ? The reason for my question is
that I read in a previous post that is was below 100 ps but when I run the
timing analyzer it seems it is more like 300 ps. Did I miss something ? If
not is my 450 ps skew small enough to consider no extra effort necessary ?
Thanks,
J.F. Hasson
snipped-for-privacy@xilinx.com...

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