PowerPC_simulation

Does anybody know how can I simulate with Modelsim a design that containts a PowerPC in a Virtex-II Pro FPGA? I have done the PowerPC design using the EDK, and I have imported the design in ISE where I have connected it with another design implemented in the FPGA and now I want to simulate the whole design. I tried to create a testbench waveform in ISE, but it didn't work.

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Vangelis
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PowerPC in a Virtex-II Pro FPGA? I have done the PowerPC design using the EDK, and I have imported the design in ISE where I have connected it with another design implemented in the FPGA and now I want to simulate the whole design. I tried to create a testbench waveform in ISE, but it didn't work.

This isn't very well documented by Xilinx (IMO) but there are two different ways.

One is a "bus functional model" simulation which (as I understand it) needs a download from Xilinx and a CoreConnect license from IBM. I'm not sure but I believe this doesn't simulate object code running on the PPC, but provides functional blocks resembling the PPC bus interfaces.

The EDK "Getting Started" PDF documentation talks you through the download and license process, then leaves you on your own.

Then the Platform Studio User Guide doesn't mention CoreConnect anywhere at all (at least not in the 7.1 documentation), but assumes you are using the other technique. This is the "SmartModels" Swift interface, which provides a full simulation of the PPC, but requires an additional license from Modelsim ($2k or so) for the Swift interface. I can't remember the details of installation, but they are quite well described in the EDK Platform Studio User Guide.

This works well enough for me, but the tools don't (at 7.1) support it very well. You build the executable as normal, then "Generate Simulation Files" from the tools menu. This takes quite a while and rebuilds the simulation files for the entire PPC system, even if you have only changed the executable.

Recompiling the whole lot in Modelsim takes a very very long time; but (for software only changes) you really only need to recompile the "system_init.vhd" file which loads the BRAMs with the new executable. Software only changes could usefully be streamlined by the tools...

Sim time units are bizarre; a 1ns step is too long, but 1ps warns that it is "finer than necessary". (Probably 10 or 100ps is expected, but 1ps works)

- Brian

Reply to
Brian Drummond

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