I'm desperate... EDK project simulation

Oct 05, 2005 7 Replies

Hello



I have a system implemented in hardware and I prototyped it i



VIrtex-II Pro platform with a testbench. I analyzed the signals usin chipscope and it worked the same as in simulation. After this, created a project in EDK and substituted the testbench by Microblaze processor. The project stopped working. Now, I need t debug the harwdare in order to find the problem, ut I don't know ho to do this. I'm trying to use ModelSim In fact, I generated the simulation files and created the testbenc file to stimulate my system. However, this testbench just generate the clock and reset, so I need instanciate my software in order t generate the other stimulus. Is it possible? What do I have to do i order to incorporate my software in simulation? Does anyone can hel me?



Thank you!


Meliss


For me, the best way to debug hardware with a microblaze inside is to instantiate a ChipSocpe icon and ila inside the design, connected to the secondary bscan port of an opb_mdm connected to the microblaze. This way, you may debug hardware or software (not simultaneously) easily.

If your tb entity name is Test_sim and if your EDK system instance is UUT, add this to your testbech :

configuration tb_conf of Test_sim is for testbench_arch for UUT: system use configuration work.system_conf; end for; end for; end tb_conf;

Also, simulate the tb_conf configuration and not just your test bench entity. (when selecting what to simulate). EDK will also create a system.do or a .do to load everything needed IIRC.

Sylvain

In fact, I had already put this configuration statments in the end o my testbench, but I didn't see the software working. My system jus writes the value '1' in a register(slv_reg0) and '2' i another(slv_reg1), but when I simulate the system in ModelSim th registers continue with the value '0'. Shouldn't it change the valu of my registers

Melissa Vetromille wrote

usin

ho

i

hel

If your tb entity name is Test_sim and if your EDK system instance i

UUT, add this to your testbech

configuration tb_conf of Test_sim i

for testbench_arc for UUT: syste use configuration work.system_conf end for end for end tb_conf

Also, simulate the tb_conf configuration and not just your test benc entity. (when selecting what to simulate) EDK will also create a system.do or a .do to load everything neede IIRC

Sylvain[/quote:95a6018ae6

I had already tryied to debug using chipscope, but it showed a error. The place and route report showed that I have 1 BSCAN an with chipscope I have to use another. So, I'm trying to use 2 BSCAN and it overmaps the FPGA. What do I have to do in order to us chipscope? I inserted a chipscope_icon and a chipscope_opb_iba. Do have to insert something else?

On Tue, 04 Oct 2005 19:16:46 -0500

wrote

usin

ho

i

hel

For me, the best way to debug hardware with a microblaze inside is t instantiate a ChipSocpe icon and ila inside the design, connected t the secondary bscan port of an opb_mdm connected to the microblaze This way, you may debug hardware or software (not simultaneously easily.[/quote:388bc6029c

You must create a new chipscope icon with Disable Boundary Scan Component Instance. hta will give you an Icon with more ports than usual, these ports must be connected to the corresponding ports of the opb_mdm component (use Show ports with default connections when connecting ports)

On Wed, 05 Oct 2005 19:16:02 -0500

wrote

th

I don't know how to disable the boundary scan component instance.

tryied to do this, but it was unsuccessfull. Could you help m again

Thank you

Open Chipscoper Core generator. Select ICON, press Next>. Write name of file, select device family and in ICON parameters select Number of Control Ports and Check Disable Boundary Component Instance, press Next>. Slect you preferred settings, and press generate Core. There you are.

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