original PCCOMP is used to generate the object file for the KCPSM3 so pccomp generates assembly for kcpsm3.exe that emits hex or actually "MEM" directly suitable for DATA2MEM
so only vendor tool used is really only data2mem - there is open-source project in progress to offer 3rd party data2mem like services so it could be that the all process to final bitstream uses no vendor supplied tools at all. .. kcpsm3 has 1k word code size
this version is only 'get it going with PicoBlaze' version - the main reason why I did is was the wish to support _all_ Xilinx FPGA starting from XC2S15
in all spartan3, virtex-2/P/4/5 based systems an MicroBlaze is already useable.
sorry for sparse docs - I was just little impressed to see the picoblaze c compiler to be working in action so I packaged the stuff and made available for downloads
the actual documentation is being prepared as well, and will be released when microblaze based system are ready to release
no. the PicoBlaze C compiler is not very optimizing. so dont expect miracles. but still it was fun to see that it is useable and produces working code. if you want to test out you can download the PCCOMP from the authors site or download the MicroFpga demo package where it is included, the script there deletes all interim files, so just uncomment the call kcspm3_clean.bat and you will have the assembly file left in place
i have written one REALLY optimizing risc compiler once, it was pretty hard task as I wanted the compiler to take advantage of all the resources the best way actually i have partially ported that compiler to produce picoblaze code, but that isnt finished, maybe/hopefully i have time to revise my compiler, but no promises right now
I like what you have done and are trying to do with MicroFPGA. Nice idea!
I downloaded your MicroFPGA test-package but I can't get it working correctly. As I understand the clock used are created by some kind of internal DDS of something? Can you explain this further? Can this give problems with differnet circuits?
I tried out both the build.bat for the assembler-example and the build.bat for the C-example. Both of them create a download.bit but when downloading them using Impact no LED is blinking.
I use: Windows XP Spartan3-Starter Kit 200K from Digilent and also pointed out both the correct circuit (xc3s200_ft256) AND the correct board (digilent\s3sk) ISE v8.1 - Impact for download, and the standard Parallell-JTAG cable that came with the kit!
I also changed the assembler code to reflect the correct pins for my board:
-snip- ... OUTPUT ON, pad_K12 OUTPUT OFF, pad_P14 OUTPUT OFF, pad_L12 OUTPUT ON, pad_N14
OUTPUT OFF, pad_P13 OUTPUT ON, pad_N12 OUTPUT OFF, pad_P12 OUTPUT ON, pad_P11 swloop:
OUTPUT ON, pad_K12 CALL ledelay
OUTPUT OFF, pad_K12 CALL ledelay
A note is that the "prepare.bat"-file uses direct-path to the xilinx82-environment and for me that is using xilinx81 I must manually go in and change it and it did not indicate any errors before doing this either. Use the %XILINX% environment variable instead in some smart way. I've changed it to suit me, but this didn't fix the problem..
Do you have any ideas what could be wrong with my setup? The end-result is that the board indicates a correctly download-procedure by lighting the green LED next to the "PROG DONE" button. How should the RESET be handled within Impact? Now it automatically starts (try to start) after the programming has finished.
Keep on working on the tool and I'll keep on testing it and reporting back!
"spartan3wiz" schrieb im Newsbeitrag news: email@example.com...
thanks a lot for trying - it seems that you made all correct there was however a minor typo in assembly example build script namly project was set to 'blink' and source code was 'leds' as result an empty hex file was created, and that will not do anything.
the c example should have compiled out of the box, and assuming the board specific include file was ok, it should have worked.
all MicroFpga's start without the need of any external signals eg no clock or reset is required depending on the MicroFpga config there may be options to change the clock later to either different frequency or source.
note that there is also no need to worry about "startup clock" setting, the same bitstream will work without changing the clock option from jtag and from cclk based configuration method.
S3sk board has LEDs active high, so when the microfpga is loaded all of them should be half-on because of the fpga pullups.
if want to troubleshoot uncomment the "clean" to leave all files in place and look that the .mem file is not empty
after configuring with download.bit read back the usercode should be a5000001
if that all doesnt help please contact per email, we do provide support
Thank you very much for your support while messing around with the demo-versions of MicroFPGA. Now everything works out fine. In the end it all was configuration bug in either the Spartan-3 Starter Kit or the Xilinx ISE package! I still think that Xilinx has a great complete solution for FPGA-development. All software has bugs... you just have to find a way to work around them! :-)
PS: That LED is blinking like hell now! I can hardly get it to stop! :-)