PLB Master Example

Apr 25, 2008 3 Replies
R

Hi all, Im building a custom IP that needs to write data to DDR Ram on the XUPV2P board (Virtex 2 Pro). Basically need to dump data from a 16kb BRAM to DDR in burst mode. Data width is 64bits, which is the same as the PLB DDR Controller Im using. Can someone point me to an example that shows how to write to the PLB bus? The PLB IPIF example was confusing and I couldnt follow it completely. Maybe a more noob friendly way example would help. Some sample code to get me started would be great :)



TIA. Raghu.



PS : 1st post here. Yay!


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A

Which version of the tools are you using (which version of the PLB?)

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R

Using EDK 9.2 and PLB Version 3.4. If needed I can move to EDK 10.1 and PLB 4.6 I guess. Is there a lot of difference in the 4.6 version when compared to 3.4?

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R

I got the PLB IPIF working with the provided example. There are a couple of signals that I didnt follow.

1) What is the need for IP2IP Address? 2) Does DMA do 1 data transaction per PLB clock? From what I understand the new address and data are placed on the bus every alternate clock cycle since 1 clock is wasted in going to CHK_BURST_DONE state, where a check is made on whether the necessary number of bytes have been written.

Raghu.

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