I have Implemented PCI Core in xilinx FPGA. The clock input to the core is coming from the the mother board. And Should i include the DCM for the clock input before giving it to the internal design. Won't it affect the specification.
Becasue DCM may introduce some shift in the Clock. And PCI is not source synchrnous. It is operating under common clock.
Correct me if i am wrong.
Thanks and Regards, Muthu S