Is there information on how to use a user IP that is attached to the OPB with different clock speeds? I currently have the IP core wrapped in the default Import Peripheral Wizard files. The user_logic is Verilog. The custom IP is instantiated in the user_logic. Different bits of several slave registers are conected to the core. MicroBlaze code "talks" to the slave registers by using the customary addressing is C code.
There is one trigger bit that starts the user IP. Once the functionlaity of the IP is done, it asserts a flag that is routed back to the user_logic level. I added an "else if" statement to the default slave register model implementation in the user_logic. The default implemetation has two states. The first is "if ( Bus2IP_Reset == 1 )", the other is the "else" and assigns the slave registers based on the "slv_reg_write_select" signal. I inserted an "else if" before the aforementioned "else". It goes: "else if (done_flag_i)", and assigns to slave register 2. It "clears" the bit that initially triggered the module. The embedded code waits in a while loop until the bit is cleared.
This has worked GREAT (no problems!) while the exact same clock is connected to both the OPB clock and the user IP's clock. We are trying some things with clocking. If we connect the OPB clock of this core to the common clock that attaches to all other OPB clocks and the uBlaze, and then we connect another DCM-derived clock to the user IP core clock, the behavior is hit or miss. We have tried different clock speeds. One experiment was to use the two different clocks, but at the same speed. Again, this doesn't work consistently. There are definitely the facts that the two clocks are not EXACTLY the same speed, and there is no phase certainty between the two clocks.
I am thinking that we either need to implement clock domain crossing sync logic on each signal that passes between the user_logic and the IP core we instantiate or that we need to take advantage of the handshaking signals of the OPB...like the ack signal. However, I can't seem to find any examples of how to do this -- the handshaking that is. I know how to implement the sync flops. The opb_ipif_pdf vs 3.04a document has info, but appears to not have any figures (timing diagrams) where it is supposed to. Maybe mine is screwed up!
Any advice would be appreciated!!