I have an IP core than needs to eventually transfer data such that MicroBlaze (and maybe eventually PowerPC) has access to it. The data will be pushed out of the IP in bytes. It is possible that only 2 bytes are output for a given 'frame' of data. It is important that these 2 bytes get processed. More data may not come in until much later in time...relatively. Other cases will push more bytes per frame.
One option would be to place an asynchronous FIFO in the data path. The bytes would get stored in that FIFO using the IP's clock. The read port would be connected to an OPB IPIF FIFO. The OPB FIFO would store the data from the asynchronous FIFO using some yet to be determined logic. Then the OPB could request data through the IPIF interface.
We've thought about using the FSL but that option is not available (as far as I know) on the PowerPC. The problem with using the IPIF FIFO directly is that it is synchronous to the OPB clock. The IP is on a different clock.
Any suggestions as to a better way to do this?
Thanks!