Multiple UCF support in Xilinx ISE

Hi, I need to know is it possible to add multiple ucf files in an ISE project? I tried to do this by splitting the original ucf file into two and added it into a project. The tool compiles only one file and assigns default IOs to the the rest of the pins mentioned in the second part of the ucf. Any comments...........any tool settings I am not aware of.........

Thanks in advance

-farhan

Reply to
maverick
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Hi, Farhan,

ISE right now does not support multiple ucf files. But I think it is going to be supported form ISE10.1 that is what I had heard, am not sure though.

-- Goli

Reply to
Goli

This single UCF is hard to handle. I construct the Pin Constraints by a script out of the layout. Then i have to add all timing constrainst by hand.

--
Uwe Bonnes                bon@elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik  Schlossgartenstrasse 9  64289 Darmstadt
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Reply to
Uwe Bonnes

If you script (makefile, shell script, dos batch file, etc.) your build instead of using ISE, it becomes trivial to concatenate a number of UCFs into a single file and pass that to the tools.

Regards, Allan

Reply to
Allan Herriman

Isn't it possible to include other UCF files?

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Reply to nico@nctdevpuntnl (punt=.)
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Reply to
Nico Coesel

Goli is correct.

Reply to
<steve.lass

Why not just concatenate the files?

/michael

Reply to
Michael Laajanen

Hi Michael, For the same reason that I don't concatenate all my VHDL files into one big whopper. HTH., Syms.

Reply to
Symon

Maybe I missunderstand you but I ment concatenate them prior to the P&R run.

/michael

Reply to
Michael Laajanen

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