Does any one know how to set the search path so my modelsim pe 6.0c will find the .mif file associated with my coregen blocks? I get the following error:
# Loading C:/Xilinx/vhdl/mti_pe/XilinxCoreLib.cordic_v3_0(behavioral) # ** Error: (vsim-7) Failed to open VHDL file "dds_SINCOS_TABLE_TRIG_ROM.mif" in rb mode. # No such file or directory. (errno = ENOENT) # Time: 0 ns Iteration: 0 Instance: /ddr_9479_tb/uut/bfo_g1/nco/bu273 # ** Fatal: (vsim-7) Failed to open VHDL file "dds_SINCOS_TABLE_TRIG_ROM.mif" in rb mode. # No such file or directory. (errno = ENOENT) # Time: 0 ns Iteration: 0 Process: /ddr_9479_tb/uut/bfo_g1/nco/bu273/dp_primitive File: C:/Xilinx/vhdl/mti_pe/XilinxCoreLib/XilinxCoreLib_source.vhd # Fatal error at C:/Xilinx/vhdl/mti_pe/XilinxCoreLib/XilinxCoreLib_source.vhd line 80173
If I copy the .mif to the root directory it works okay, but I want to keep my top module and test bench one directory up from the subblocks.
Thanks, Clark