ML401 JTAG configuration problem

Aug 02, 2005 3 Replies
P

While I'm waiting for EDK to be delivered I thought I'd play around with a hardware-only design.



I made a trivial LED flasher, and went to download it through Parallel Cable IV / JTAG.



I'm using ISE 6.3.



When I use impact 6.3.03i to load the LX25 bit file (I'm bypassing the other three devices) I get:



WARNING:iMPACT:1049 - Startup Clock has been changed to 'JtagClk' in the bitstream stored in memory, but the original bitstream file remains unchanged.



If I ignore this and program anyway, I get six errors on verify. Multiple write/verify cycles always give six errors.



The design seems to work though.



What am I doing wrong? The V4 is ES if that's significant.



Thanks



Pete


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N

hi there,

i am new in these thing as well, so i might not be correct.

i would recomend to try to set the global clock to jtag clk.

right click on "Generate Programming File" -> properties -> startup options and then set FPGA startup clock to JTAG

cheers

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P

That got rid of the clock warning message, but it has now gone up to 262 differences on verify.

The (very simple) design still seems to work though.

Perhaps I'm doing something else wrong.

I don't need to set any jumpers or switches on the ML401 for direct JTAG config, do I?

Thanks

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N

no idea, sorry.

though, i dont remember changing switches from the default setup

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