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MAP: what are route-through look up tables

Hi!

Could anyone explain, what are route-throughs in look up tables and why are they used? When I run the map command (xilinx) on my design, I get in the report file (design.mrp) a section:

Design Summary: Number of errors: 0 Number of warnings: 3 Number of CLBs: 124 out of 324 38% CLB Flip Flops: 81 4 input LUTs: 203 (3 used as route-throughs) 3 input LUTs: 68 (13 used as route-throughs) Number of bonded IOBs: 62 out of 144 43% IOB Flops: 0 IOB Latches: 0 Number of clock IOB pads: 1 out of 8 12% Number of primary CLKs: 1 out of 4 25% Number of startup: 1 out of 1 100%

Thanks in advance

Frank

Reply to
frle
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Hi Frank, There is an XOR gate (mainly for arith operations) in xilinx slice. whenever synthesis tool uses this XOR gate for some operation, LUT is used in bypass mode (i.e input is directly connected to output) and that is the only way to access XOR gate. All these LUTs are reported as route-throughs in mapping report

Reply to
digari

A route-through LUT is used any time an external signal needs to reach a slice resource that can only be reached by using a LUT. The most common case is when it's necessary to reach a FF D-pin when the direct connection BX/BY is already used for something else, such as CIN or F5/F6MUX select.

Regards, Bret

Reply to
Bret Wade

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