i am getting these errors can anybody help!!
ERROR:HDLCompilers:27 - "../../Documents and Settings/deepak/Desktop/8051/trunk/rtl/verilog/oc8051_alu_test.v" line 62 Illegal redeclaration of 'oc8051_alu'
ERROR:HDLCompilers:26 - "../../Documents and Settings/deepak/Desktop/8051/trunk/rtl/verilog/oc8051_alu_test.v" line 322 Macro reference `OC8051_ALU_PCS is not defined
You don't say what tool you're using, whether you're trying to do simulation or synthesis, and whether you've written oc8051_alu_test.v yourself, or if you got it someplace, where and whether you've modified it.
That error message indicates that something called "oc8051_alu" is being declared twice. Have you looked through that file to see if it's happening within the file?
You're attempting to use a macro that doesn't exist. If you wrote the code, then you probably misspelled the macro either where you define it or where you use it. If you didn't write the code, tell us where you got it.
If you're trying to make an 8051 core work and this level of problem stymies you, you have a long row to hoe.
-- Tim Wescott Control system and signal processing consulting www.wescottdesign.com
Settings/deepak/Desktop/8051/trunk/rtl/verilog/oc8051_alu_test.v" line 62 Illegal redeclaration of 'oc8051_alu'
Settings/deepak/Desktop/8051/trunk/rtl/verilog/oc8051_alu_test.v" line 322 Macro reference `OC8051_ALU_PCS is not defined
First, if you're using Xilinx tools I would suggest moving your project to a directory that has no spaces in the path like c:\projects
Second, I suspect that although you're only seeing 2 errors, there must be piles or warnings that would probably shed light on the real issue. For example your second error saying that a Verilog macro is not defined often means that some `include file was not found and therefore you missed out on all of the `defines in that included file. This often happens in the Xilinx tools if you don't tell it where to look for included files or put a more complete path in the `include statement.
-- Gabor
Settings/deepak/Desktop/8051/trunk/rtl/verilog/oc8051_alu_test.v" line 62 Illegal redeclaration of 'oc8051_alu'
Settings/deepak/Desktop/8051/trunk/rtl/verilog/oc8051_alu_test.v" line 322 Macro reference `OC8051_ALU_PCS is not defined
It seems oc8051_alu_test.v and oc8051_alu.v define the same module inside so you probably want only one of them. It seems like alu_test is a new module in development. Try running the scripts in the sim directory instead of trying to make your own tests.
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