I2C on Xilinx V4

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Well, I have a requirement for I2C or IIC communications to some video
decoder chips on a new board I am designing.  I would rather had not use
this bus, but it seems that the Philips people have started a defacto
standard in the video decoder world.

So my questions are, what IO standard is best to use on a Virtex4, and what
pullups should I use? The TI part I picked, the TVP5150AM1PBSR, has 3V3 volt
digital connections. There are also two 1.8V requirements.

And are there any free examples of VHDL that will drive slave devices.  I
have found an ap note Xapp172 Design of Video Capture but I can't find the
source code downloads.

I see on the Xilinx's Video Daughter Board (not V4) for the ML40x boards
(are V4), that the SCL and SDA seem to be driven by a 3.3V bank7 and are
pulled up with what I think are 4K. Weird BOM.

Then I will have the issue of running multiple devices, more than are
addressable by the hardwire addresing options.  My first thought is to run
multiple IOs from the V4.  Is this the best solution?

TMA Thanks Much in Advance,

Brad Smallridge
Ai Vision dot com





 



Re: I2C on Xilinx V4
Brad Smallridge schrieb:

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3.3 V LVCMOS or LVTTL is fine.
Pull up of 4.7k to 10k is fine.

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What kind of 1.8V requirements? For I2C communication?

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There are some app notes that describe a I2C master/slave block,
including VHDL source. I dont have the number handy.

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Just fine.


This is one solution. In similar situation were multiple devices with
the same I2C address had to be connected to a I2C bus, we used I2C
switches/MUXes. Philips offers them.

Regards
Falk

Re: I2C on Xilinx V4
the easiest way may be adding a picoblaze to handle the i2
initialization

http://www.dulseelectronics.com/download/download_index.html

there are some examples,

I am using this approuch to initialize chrontel DVI chips and Agilent
smart cameras
on an Virtex-4 board

the DVI application (a pong demo) will soon be added to reference
designs available
online http://hydraxc.xilant.com

basically you use the picoblaze as black box and connect to i2c

the code that initializes ch7301 then is coded as picoblaze assembler,
like her

    ; Enable DVI power
                LOAD sA, 49
                LOAD sB, C0        
    CALL I2C_DVI_WRITE

Antti Lukats


Re: I2C on Xilinx V4
Hi Brad,

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I have pasted some code below, hope this helps. We have used this code
to control audio volumes of Crystal DACs. The module takes volume data
from the outside world and sends them to the DAC via I2C. Should be easy
to adapt.

I believe this is way easier than using PicoBlaze for the task.

In case you need the file (due to line break problems, whatever), drop
me a line.


Best regards, Felix

--
Dipl.-Ing. Felix Bertram
http://www.bertram-family.com/felix


We've slightly trimmed the long signature. Click to see the full one.
Re: I2C on Xilinx V4

The I2C interface is pretty simple for just talking to a slave.  I
personally find it much easier to just infer a shift register and small
state machine rather than putting in pico or microblaze and all the
baggage that goes with it.

Re: I2C on Xilinx V4
it depends, :) microblaze is true overkill, but picoblaze isnt,
specially if you have some other minor managements taks to take also,
then it really pays the fpga resource price it takes

antti


Re: I2C on Xilinx V4
: it depends, :) microblaze is true overkill, but picoblaze isnt,
: specially if you have some other minor managements taks to take also,
: then it really pays the fpga resource price it takes

Also if the 'I2C' device isn't following the spec particularly well then
debugging the interface by reloading the picoblaze ROM at run time makes
for a much better interactive debugging experience than recompiling VHDL!

Of course this isn't relevant as nobody would ever ship a device with a
broken I2C compatible interface...

cds

Re: I2C on Xilinx V4
Excellent! Felix, Thank you.

This code synthesizes to 26 slices on a V4.
Probably more if more I2C need to be sent.

I needed to change only this clkdiv line to
help speed up a ModelSim simulate,

-- signal   clkdiv:  unsigned(8 downto 0);
 signal   clkdiv:    unsigned(1 downto 0);

I'll change it back to adjust to my frequencies.

All the SDA and SCL lines appear to be rising and
falling per I2C spec.

Thanks so much.

Brad






Re: I2C on Xilinx V4
Hi Brad,

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I am glad to hear that this was helpful.

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all I2C data are stored in a ROM (seq, seqT) which is probably 10 bits
wide (i2cT) and as deep as your I2C sequence requires.

In case you have longer sequences, you might want to check how this ROM
is really synthesized. If the synthesizer does not infer the ROM
properly, you might want to replace the command tag (i2cE) by a two-bit
vector.

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the module was originally clocked by a 24 MHz clock. You might need to
adjust it to your requirements.

And of course: You will need to create your own I2C sequence. Please
note that the module is cyclically repeating the pattern. This might or
might not fit with your application.



Best regards, Felix
--
Dipl.-Ing. Felix Bertram
http://www.bertram-family.com/felix

Re: I2C on Xilinx V4
Excellent! Felix, Thank you.

This code synthesizes to 26 slices on a V4.
Probably more if more I2C need to be sent.

I needed to change only this clkdiv line to
help speed up a ModelSim simulate,

-- signal   clkdiv:  unsigned(8 downto 0);
 signal   clkdiv:    unsigned(1 downto 0);

I'll change it back to adjust to my frequencies.

All the SDA and SCL lines appear to be rising and
falling per I2C spec.

Thanks so much.

Brad




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