I'm developing an embedded web server into a XupV2pro board with a VirtexII-pro fpga. While all my code was in the bram memory all works fine, the problem was that the application grew and grew until a moment when the EDK says that my bram was full. Now I need relocate some parts of my application (code, data or both) to fit in external DDR RAM, the problem is that I try to do this visually with the EDK's option 'generate linker script', putting section .text and .data outside bram into DDR. I recompile the project and all is right but when y download it to the fpga it doesn't work. I go back, remove some files of my project, generate a new linker script where all sections were in bram, compile, download and it run fine. I would like you help me to understand the 'linker script' and how to generate one for my purpose.
Thanks in advance.