FPGA : P&R problem - Help !

Bijoy, Use a bigger FPGA? You've used up all the resources. It works at 17 bit wide, because the multipliers are 17x17, if you're doing signed arithmetic. HTH, Syms.

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ERROR:Place:341 - The design contains 3 Block RAM components that are configured as 512x36 Block RAMs and 11 Multiplier components. The Multiplier site adjacent to the location of a 512x36 Block RAM component must remain free because of resource sharing. Therefore a device must have at least 14 Multiplier sites for this design to fit. The current device has only 12 Multiplier sites.

errors pops up if i reduce the input width to 17-bit, the design won't give any error.

I believe someone mentioned recently that you cant use a block ram and it's adjacent multiplier at the same time if the block ram is configured in 36 bit mode.

A possible solution, which may or may not work, would be to build each

Cheers,

Andy.

Hi Andy, Yeah, that might work. Make the 512*36 a 1024*36 made from 2 off 1024*18. Then it should fit, as you've still only used 6 BlockRAMs. Cheers, Syms.

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