I have been researching floating and/or fixed point support for Xilinx FPGAs that can be synthesized using the ISE Webpack toolkit. After foolishly trying to synthesize the "real" type and then researching various options I came across the following links:
Now, I am a little confused as to how to go about using these sources. They mention using the IEEE_proposed library.
Q. Does that mean that Xilinx ISE will provide the IEEE_proposed library ?
Q. If not, do I have to compile this library myself using the provided source code for fixed and floating point math ?
Q. Has anyone successfully used this code and/or synthesized floating point on a Xilinx FPGA using ISE Webpack ?
Any help will be appreciated.