EDK 9.1 + Virtex 5 Hard MAC

Hello All,

I'm learning how to use Xilinx EDK, but am stuck... I figured out how to create a simple Microblaze system which uses the opb_ethernet IP core, but I would like to switch to the hard MAC on the virtex5 fpga. EDK does not have a wrapper for this in it's IP core list, so I used the Xilinx Core Generator to generate it. The problem I am having is importing the core into EDK. This is what I have tried so far:

1. Import the core using the EDK wizard, Selecting DCR slave bus as my connection [ I can only find two .vhd source files to import]
2. Add the core to my design.
3. Add an opb_dcr bridge

Am I on the right track? Any hints?

Thanks

-Jorge