While creating a new design using EDK, in ADD/EDIT CORES -> PORTS tab Signals can be separated into external ports and internal ports. Does anyone know of any document which explains this?
All these ports are internal or external with respect to what??? Which signals should you call internal and which signals should be called external???
Please help.
While creating a new design using EDK, in ADD/EDIT CORES -> PORTS tab Signals can be separated into external ports and internal ports. Does anyone know of any document which explains this?
All these ports are internal or external with respect to what??? Which signals should you call internal and which signals should be called external???
Please help.
While creating a new design using EDK, in ADD/EDIT CORES -> PORTS tab Signals can be separated into external ports and internal ports. Does anyone know of any document which explains this?
All these ports are internal or external with respect to what??? Which signals should you call internal and which signals should be called external???
Please help.
Which
The external ports are the inputs/outputs to/from the FPGA. For instance, if you are using the serial interface (UART), you will have a few of these external ports. These ports should be listed at the top of the MHS file. (see the EST guide for what the MHS file is)
The internal ports are the inputs/outputs to/from the top-level modules/pcores in the EDK design. If you look at the MHS file, these are the ports that are listed for each pcore in your design.
Thanks, that was helpful.
Milind
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