EDK Custom IP

Jun 27, 2007 1 Replies

I am trying to add a custom IP to my EDK project. I am using the Avnet Mini-Module (MM) and EDK 9.1i SP2. This is my first custom IP and I am starting off small. The MM baseboard has three LEDs that I am trying to turn on/off. From my working project I created a custom IP template and then imported my template into my project. I then made the following changes:



To system.ucf I added:



Net fpga_0_LED1_pin LOC =G5 | IOSTANDARD = LVCMOS33; Net fpga_0_LED2_pin LOC =F5 | IOSTANDARD = LVCMOS33; Net fpga_0_LED3_pin LOC =E5 | IOSTANDARD = LVCMOS33;



To system.mhs I added the following:



PORT fpga_0_LED1_pin = fpga_0_LED1, DIR=O PORT fpga_0_LED2_pin = fpga_0_LED2, DIR=O PORT fpga_0_LED3_pin = fpga_0_LED3, DIR=O



and my custom IP



BEGIN opb_test PARAMETER INSTANCE = opb_test_0 PARAMETER HW_VER = 1.00.a PARAMETER C_BASEADDR = 0x73c00000 PARAMETER C_HIGHADDR = 0x73c0ffff BUS_INTERFACE SOPB = opb PORT LED1 = fpga_0_LED1 PORT LED2 = fpga_0_LED2 PORT LED3 = fpga_0_LED3 END



And finally the opb_test.vhd file:



In the entity under user ports I added: LED1 : out std_logic; LED2 : out std_logic; LED3 : out std_logic;



In the architecture I added the following internal signals: signal iLED1 : std_logic := '1'; signal iLED2 : std_logic := '0'; signal iLED3 : std_logic := '0';



An also in the architecture under begin I added:



LED1


I am not sure if the initialization of this sort is synthesizable. It might be for clocked signals, but certainly not for combinatorial as is the case in your code. Just do explicit assignment and see if that works... Something like:

iLED1

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