Hi All I want to download bit file to the FPGA to program it w/out using any GUIs like the JTAG programmer. I need to write some kind of APIs for this. Could anyone suggest how to do this and what would be the kind of interface required for the same. please help Anuja
I went through all the xapps but i dont think they have mentioned clearly.. also i am trying to code in C .. one thing i dont understand is .. if i code in C .. how is the JTAG cable going to understand the commnads or the signals to be sent ??
Basically, you need some type of interface from your software to the FPGA hardware for configuration, JTAG is an example, and the Xilinx Serial Slave mode is another. The serial slave mode is the simplest. you need a clocl line, a data line, a program line, and a way to read back done and init. With software you shift the data out 1 bit at a time to the data pin, and you make the clock signal go high and low with software too. This is how the old Xilinx parallel download cable works (for both serial slave and JTAG modes).
You should be totally confused by now. Let me try and help:
The parallel download cable is called parallel because it uses the parallel port of the PC. BUT it is used to send data serially (one bit at a time) by directly controlling turning various bits of the parallel data on and off. One of these bit is used as the serial slave clock, and another is used for serial slave data.
Have a look here at what Xilinx has inside their cable:
Once you understand this, everything else is easy :-)
Can the downloading of the bit file be done w/out using an embedded processor or EPROM/PROM as we are just trying to program the device autonomously. This is not going into production so i dont have to worry about loosing the configuration data in case of power loss. Anuja
If this is a Virtex part you can try using the ICAP (Internal Configuration) Port. This allows you to have the device configure itself. It does not need an embedded processor, but you have to be careful about your bitstreams in that the new bitstream with which you are programming the device must have the same ICAP logic in the same location as the previous bitstream, else your configuration logic will change mid-stream and stop reconfiguration. You could also use partial bitstreams to avoid overwriting the ICAP control logic.
I got the playxsvf executable code... i had some questions regarding that.. Can this code be used to configure Virtex II Pro xc2v7? I was successfull able to convert the bit file to the svf format... but the svf2xsvf executable file doesnt seem wo work... i am trying to congigure Virtex II Pro on an Avnet board... which has a chain of devices.. do i have to worry about setting the bypass registers of the other deivces to '1' or does the C code take care of this?