Unified FPGA Development Suite

Is there a development suite that is good but can target multiple fpga manufactures? I don't really want to install a bunch of 1GB+ light versions for each manufacture just to see which one is best. In fact I can't even get libero to run because it crashes on startup.

Also, know of any links for DIY fpga programmers? How hard is it to program? I figured that one just has to feed a bitstream into the fpga similar to how a pic is programmed(or most devices actually). Looking at the proASIC's makes me think it's a bit different but I haven't found any conclusive way to program them except by using DirectC or the STAPL Player. Since I'm experimenting with these different manufactures I don't want to have to buy a programmer for each chip. For as much as they cost I could get nanoboard with 10^10x the functionality.

Reply to
Jon Slaughter
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BTW, I forgot to mention that I want to program in C++. Pure C++ but SystemC or similar if necessary.

Reply to
Jon Slaughter

Looking at

Which is probably going to create a bit of work to create a programmer unless someone has already done it for the pic's.

Reply to
Jon Slaughter

Ok, take a look at Altium. I think they only really support three manufacturers, but for $399 you can get their Xilinx development board to try things out!

Charlie

Reply to
Charlie E.

I had to download Libero four times at home before it would run. It worked fine at work though.

You can use Synplify, or a number of others, as the front end tool. If you buy the license directly from Synopsis with the necessary libraries for all vendors, but you're stuck with the manufacturer's tools for the back end. Be warned, this approach is not for the poor and is generally only done by those that either need really big devices (and pay through the nose already) or need really fine tuned logic.

Just the download cable? Sure, do a web search. I think even opencores has a design for a JTAG cable. I saw it somewhere recently anyway. My time is worth more than $50 or $100 though.

Not sure what you're looking for. Programming the device is easy. Creating the files is impossible (without the manufacturer's tools).

FOr SRAM based designs you have to do this every time you power on. They generally have a choice of programming methods. Small devices will use either JTAG or a serial flash interface. Larger devices will add a parallel interface option. Flash based devices (CPLDs or FPGAs) tend to use JTAG. You can either program them using a USB/JTAG cable or via an embedded micro (they have the tools to embed the JTAG app).

USB to JTAG cable. It's a flash based device so you don't have to program it on each power up, though it's a good idea to be able to update it in-system, so STAPL is in the cards.

IIRC Actel's download cable is $50 or so. Altera's is $150. It's not that big of a deal. JTAG cables for UCs have similar costs. Anyway, you might try opencores or try a web search.

Reply to
krw

Ick! You're going to pay through the nose for nothing.

Reply to
krw

C++ is a procedural language. FPGAs are not procedural devices.

John

Reply to
John Larkin

You can program the Xilinx parts with three wires from a parallel port and a little bit-banging code.

John

Reply to
John Larkin

Sure. You can do that with any of the SRAM based FPGAs via the serial configuration port. SRAM based FPGAs need to be configured at every power cycle though. Flash based FPGAs, of course, don't have to be programmed each time but have no serial (or parallel) configuration path, only JTAG. You could probably do JTAG programming that way too, via the STAPL player path. It's something he could look for.

The other alternative is a CPLD (SRAM based, but flash built in), though he's already memory limited with the smaller FPGAs. CPLDs are even more limiting (trying to fit a design into a small, $2.50, Altera MaxII now).

Reply to
krw

Is there a cheap synthesis tool for us poor analog guys that will synthesize a modest sequential task (in gates)?

...Jim Thompson

--
| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC\'s and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |
             
I love to cook with wine.      Sometimes I even put it in the food.
Reply to
Jim Thompson

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so what you really want to know is what hammer is best suited to work with diffent types of screws, nuts and bolts because screwdrivers and wrenches take up to much space in the toolbox ... ;)

pick an fpga that matches you needs, get and use the tools the manufactures made for it, you'll need their backend anyway. Program in verilog or vhdl thats languages made for that specific purpose

-Lasse

Reply to
langwadt

Not sure what you want to do. Describe a function in HDL and have it spit out unit logic? I don't know of anything that does that. Some tools have a logic viewer that might do it. I think Actel's is included in the free tools, but I haven't used it yet (trying not to use Actel, right now).

Reply to
krw

Jon, Ok, thought about this a bit. Part of the problem is that the EDA companies basically just provide a front end for the FPGA company's tools. They don't try and duplicate that back end effort, it isn't worth it for them. So, if you want to do more than just preliminary designs for each vendor, you will still have to install X number of starter editions for each vendor you want to try.

For the price, Altium at $3999 is probably the cheapest major company. When paired with their nanoboards, you can get a decent development platform to really try things out. Their latest nanoboard is only $399 and comes with a years subscription to the front end software.

There may be other small players, like Proteus, but I am unfamiliar with the tools.

Charlie

Reply to
Charlie E.

Clearly I'm not a digital guy... at least beyond pure combinational reduction, which I actually used to teach about 40 years ago.

What I'd like is some tool that took in a truth table, each line representing states at that clock tick, spitting out gates, flops, etc., to implement that ;-)

I know. I know. Hire you ?:-) ...Jim Thompson

--
| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC\'s and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |
             
I love to cook with wine.      Sometimes I even put it in the food.
Reply to
Jim Thompson

I like the analogy.

Unless, for some reason, you're pushing the envelop, this is the only way to go. Third party tools are very good, but incredibly costly. If the performance, or device size, isn't needed the manufacturer's tools work very well now. The only possible exception is simulation where the manufacturer's tools are limited (crippleware versions of ModelSim, usually). ModelSim is expensive too, though.

Reply to
krw

Pretty much, but a lot of the design can be done on any one of the vendor's tools then the design ported to the others. Of course this presumes that you don't instantiate any primitives or use exclusive features.

WHy spend the money. $4K is still a lot when the manufacturer's give the stuff away. They're quite eager for business now too. ;-) I Bought one of Altera's Cyclone-III (Arrow's, actually) development boards for $200. There are even cheaper development boards out there. Actel forgot to take their back. ;-)

If all they're offering is the front end, why bother unless the manufacturer's free tools don't work (high end chips or *really* tight designs)?

Reply to
krw

No one does logic reduction anymore, if they ever did. Gates are free. ;-)

That's easy. Put the table in a ROM and put a counter at the input. If you really want to get fancy, put a register at the output. ;-)

Nah, I'm busy now, amazingly enough with mostly analog stuff.

Reply to
krw

The problem I have is that I brought a few proASIC3's a while ago and I would like to use them. Unfortunately the libero IDE just crashes on my system. I can't even get it to a splash screen(which I imagine there is one). There support is of no help as they just say "Reinstall"(whcih I've done for various versions).

Now, it does run under vista in my dual boot configuration but I have all my tools in XP and never use vista.

Hence, I would like to be able to develop and debug fgpa code in a working environment under XP. I can then hop over to vista and "compile" the stuff in libero when I need the specific device code.

I know there are tools that do what I want. I think FPGA Advantage does it... or did it. A book called fpga warrior mentions some linux tools(I have).

Basically I just need something to get started writing some code so I can get my head wrapped around how it all works(I have an idea but I need to get some experience). I prefer to work in a C++ like language since I'm more familiar with it and oop is more powerful for complex designs. I think linux has a SystemC compiler. I do have Cygwin installed so might be able to use some of the tools there.

It just popped into my head that I could probably install libero in a VM. Although I would like something that runs directly if possible.

The point is that I just need to get started. I have some proASIC's. While I can't technically use them yet I would like to use them(since I spend about

50$ on a few chips) eventually so I want to target them. It is my understanding though that the top level code(VHDL, Verlog, or whatever) is device independent so I can still play around and hopefully even simulate. When I'm ready to do a hard test I can then just transfer the code to the platform, in this case libero, and go from there as if I started there in the first place.
Reply to
Jon Slaughter

[snip]
[snip]

What I do now (when I don't hand-off the trouble to a buddy) is do exactly that, counter, plus addressing.

So-so for simple stuff. Isn't there a better way? I'm not doing FPGA... I'm doing "gates-on-demand" ;-) ...Jim Thompson

--
| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC\'s and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |
             
I love to cook with wine.      Sometimes I even put it in the food.
Reply to
Jim Thompson

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Free but not sure if it is used for fpga simulation.

Reply to
Jon Slaughter

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