I'm using an Altera APEX20KE with 200k gates on a bought FPGA board. The Clocks 1 and 2 of the FPGA are used by the board, the Clocks 3 and 4 are free. I testet the i2c-core from opencores.org working with the onboard clock on Clock-Pin 2 and it works fine. If I connect (just connect not use in the FPGA, I'm still using the onboard clock from Clock-Pin 2) an own clock to the two free Clock-Pins, the i2c-core doesn't work anymore !!! :-( If I use my own clock on Clock-Pin 3 or 4 as clock-input for the i2c-core, it doesn't work too. I can't understand this behaviour !?!?!?
If I put in the Altera Megafunction altclklock at the input of Clock2 and Clock4 Quartus II 4.2 SP1 can't fit. The Error Messages of the Fitter are: Error: Project requires too many 2 ClockLock PLLs, but the selected device can contain only 0 ClockLock PLLs Error: Project requires 2 signals of type clock output, but the target device can contain only 1 signals Error: Can't fit design in device Error: Quartus II Fitter was unsuccessful. 3 errors, 0 warnings but the APEX20KE: EP20K200EFC672-3 has 2 PLLs according to the data sheet!!!! Is this an Error in Quartus or mine???