We are using a Stratix device and have an extensive verilog test bench. When we use the behavioral models altera_mf.v and 220model.v that come from Quartus II version 4.2 (just out) and run the test bench (with vcs) it compiles just fine but gets lots of errors. Many of the failures were things like register X reads xxx and should be something real. I thought maybe I might have to regenerate all the RAMs and such that were generated with the Megawizard plug in manager so I did that. It had no effect. I do not have time to track down the specifics of why we got failures since I have a chip to develop. Needless to say I have gone back to 4.1 SP2 and its altera_mf.v and 220model.v, which work just fine.
Does anyone else have experience, good or bad, with 4.2?