I'm an FPGA newbie, working with the freeware Altera Quartus II IDE. I used the megafunction builder to create a FIFO memory, the .v file it generated is similar to the virtual prototypes created for COM interfaces, with a data structure and no functions. Is this all that the megafunction builder provides, and I need to write my own Verilog code for eg. bumping the address registers and generating handshake signals? Or is that code generated for me already in a file that I haven't found yet? TIA
- posted
8 years ago