'Internal Error: Sub-system: ASM, File: asm_ram_model_base.cpp, Line: 3430 clock_is_used == clock_found Quartus II Version 5.0 Build 168 06/22/2005 SJ Web Edition Service Pack Installed: 1'
I used to get this kind of errors earlier in this and previous versions of Quartus, but restarting Quartus or computer was always a solution.
Project is for Acex EP1K30 device and contains 2 lpm_ram_dp megafunctions.
Can anyone give me directions what can cause this kind of problems?
Best Regards czerstwy
Is there a Mysupport service request number on this? Also please send me a project archive of your design so that we can reproduce the problem in house.
Subroto Datta Altera Corp.
I don't see anything like this.
I did some more test and now I know whats the problem. I created lpm_ram_dp as synchronous, but i overlook connecting few clocks. Compiler for Acex family don't recognize this situation as ahdl error in Analysis and Synthesis stage and successfully goes through this and fitting stage. When I change device family to Flex10k and started compilation, error was reported at the first stage in Messages->Processing window and report said that I've got some clocks input not connected.
Thanks and Best Regards czerstwy
Last time I got an "Internal Error" with quartus, it just didn't like the name of one of my signal ... I just changed the name to another name and it worked. Changing it back made it crash again so that was _really_ the name of the signal.
To 'isolate' the problem, I synthetized my project piece by piece, sub-module by sub-module to isolate the source file that made him crash.
Sylvain
Hi Sylvain,
I have no idea what caused this problem, but if you find something like this, we really would like to hear about it. Especially when you've already done our work for us and figured out how and when the problem occurs!
In the future, please file a report on a bug like this with mysupport.altera.com!
Thanks,
Paul
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