Hi, I have a problem with bringing out the INIT_DONE puls out of an Altera Flex
10k EPLD. I use Quartus II software on a PC. I also use the EPC2 configuration device. I enabled this bit in the design software and used a pull-up resistor of 1k at the INIT_DONE -pin. The signal stays low, always and it should go high when entering user mode.Can anybody help me with that?
Marc
Are you sure the device is really finishing init? Are you sure that you're looking at the right pin (this question becomes more valid the more complex and high-pin-count the package becomes, of course)?
-- www.wescottdesign.com
ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.