I'm looking in to programming a Cyclone device and it's prom via an embedded processor. I've found documentation on how to load the FPGA it's self but not the prom.
Has anyone dealt with this? Is there any ideal setup via the JTAG connection?
-Tom
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A
Antti Lukats
there is no docs about this.
if you are configuring the FGPA over JTAG you may add small ipcore that 'bridges' the cyclone_scan primitive to the asmi block, then you can use the cyclone JTAG user command to send commands to the memory on the ASMI pins. If you are using some other memory then you need to add logic from scan to the user pins connected to the memory.
formatting link
there is example how to instantiate cyclone_scan in Quartus, using the ASMI prims for the acces to the spi rom is simple as well. but you need to write some software that sends the commands using the altera jtag user command
antti
"Thomas Karolyshyn" schrieb im Newsbeitrag news:raz5e.298$ snipped-for-privacy@llnews.ll.mit.edu...
embedded
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