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Add DMA support to a custom core?

Hi everyone.

I have a core to control a I/O peripheral. This core is based on a FIFO to get words from a I/O bus (32 bits). But now, I want to read from the FIFO and copy the words to the BRAM. I know this core runs ok but I need to map the packets from FIFO to the memory so I could access whenever I want.

I have though in DMA to implement it. But at the moment I am not sure if this solution is the best. I am using "Create and Import Peripheral Wizard" from Xilinx to add this funtionality to the PowerPC proccessor and access the words by a pointer. Another solution is to implement the DMA manually but I am not any idea.

Any suggestion.

Regards Pablo

Reply to
Pablo
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Pablo,

You probably want to make a PLB master/slave peripheral with SGDMA capability. Try with the wizard you mentioned, run the demo test_peripheral.c code. Take a look at created hw peripheral repository and inspect all VHDL files for included libraries versions. The next step is to read all the datasheets related to this peripheral (particulary SGDMA which is located under %EDK%\hw\XilinxProcessorIPLib \pcores\dma_sg_vX_XX_X\doc ). When you get the idea what it is all about try experimenting with a SW for a start by putting DMA engine to work. Then mess up with user_logic.vhd - the konwledge of VHDL is essential. When you get this far, you will start asking serious questions.

Cheers,

Guru

Reply to
Guru

Thanks. What's mean SG?

Reply to
Pablo

SG - Scatter and Gather is a sophisticated DMA function which enables the DMA engine to run continuously by reading buffer descriptor from memory (not from registers). You probably cannot enable this function in cores created by the wizard (only simple DMA is available).

Cheers,

Guru

Reply to
Guru

Thanks again.

Regards Pablo

Reply to
Pablo

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