Hi all,
I wrote a generate loop to generate a switching logic. I am getting the expected circuit from the synthesizer(synplify). But it's not working in the simulator ( Modelsim ). The code is like this
genvar i; generate for(i=0;i
In what way is it not working? Is the source_out always one of the two results? Are you certain the enable isn't an "x" value?
Hai thanks for the reply I dont know how the simulator is behaving. The inputs are correct,no x driving. when i enabled the the first element and given zero as the address it was reading from the result bus but when i changed the address of second element to 1, the element is taken from the source_in even though the enable is high. When i tried to change the coding style by (i*8+:8 to i*8+7:i*8 ) the simulator saying the range specified cannot be a variable what is simple to method of coding this logic so that it work in the simulator
This is not an answer, but try to do the same in an always block using 'if'. Also separtely create the source_out and then combine it.
Your code looks valid for what you want to achieve. I'd suggest using a simulator for what a simulator does best: when you change your input values, print a big list of the input vectors, the enables, and the result for your various indicies.
You *shouldn't* have a problem. If the simulator has invalid inputs, it can give invalid results which is why I was asking about the x values. If you print out your data and sift through it, you might be surprised about why it comes out bad.
I'd suggest that for each i, you display enable[i], address[1*6+:6], result[address[i*6+:6]*8+:8], source_in[i*8+:8], and source_out[i*8+:8].
This should tell you either what input value isn't behaving as you expect or it will tell you explicitly how the simulator is failing you.
Break it down. This is debug.
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