i am using spartan 3e board to transmit UDP packets to my pc. I can write to PHY registers i.e. i have only done soft reset by writing 1 to 15th bit of control register and i can see that it executes.
The problem is i cannot read the registers or at least i cannot see any data in chipscope pro.
kindly help me out.
--------------------------------------- Posted through
salimbaba wibbled on Wednesday 24 March 2010 09:28
I think you'll get a better response if you include a snippet of the code that is doing your register IO.
Cheers
Tim
-- Tim Watts Managers, politicians and environmentalists: Nature's carbon buffer.
//=========================================================================
module mdio_module(mdc,mdio,reset,clk,execute,req1,data_sta,sta_enb); //----------------------------------- output mdc; inout mdio; //----------------------------------- input reset,clk; input execute,req1; //
//----------------------------------- output [15:0] data_sta; output sta_enb; //----------------------------------- reg req,execute_reg; reg [4:0] phy_addr,reg_addr; reg [15:0] data_phy; wire req_enb,mdio_in; reg mdio_out; //----------------------------------- reg sta_enb; reg state_z,z_reg; // reg [2:0] state,state_d; reg [4:0] count_bit,count_bit_d; reg [15:0] data_sta; reg change_enb; // reg data; //------------------------------------- parameter phy_addr1 = 5'b11111; parameter reg_addr1 = 5'b00000; parameter data_phy1 = 16'b1000_0000_0000_0000;
//-------------------------------------- parameter IDLE_STATE=3'd0,PRE_STATE=3'd1,ST_STATE=3'd2,OP_STATE=3'd3, PHYAD_STATE=3'd4,REGAD_STATE=3'd5,TA_STATE=3'D6,DATA_STATE=3'd7; //------------------------------------------ assign mdc=clk;
//------------------------------------------ always @(posedge clk) execute_reg
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