Spartan 3E Sarter Kit Ethernet

Hello. Would you please to get me some information about how can i realize UDP transmition with Spartan 3E Starter Kit? Can i use IP supplied with EDK in conjunction with Microblaze. Can I solve the problem without using Microblaze? And last questions: what is difference between AccelDSP and System Generator and can I convert some dsp floating point algorithm available in C in VHDL block?

Reply to
Pavel.Schukin
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Look at this site, there are some information:

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Yes you can, but it would be easier with the Microblaze, or a sufficiently powerful soft processor.

I think AccelDSP works with Simulink (MATLAB), not with C code. System Generator should be a tool for developing DSP apps, probably it's best suited for your needs.

Andrew

Reply to
quark.flavour

You transmitt ethernet packets by waiting for the PHY transmitt clock to go low "always @(negedge E_TX_CLK)". Then set E_TX_EN=1 and E_TXD[3:0]=first nibble. Then for every event set next nibble. Once you have supplied all data. Set E_TX_EN=0 to complete packet. You have to wait 24 cycles at 100M before sending a new one. The nibbles shall be 555555555555555D - packet data - crc32. Crc32 is calculated from packet data only.

Reply to
posedge52

If it is acceptable to hardwire the IP and MAC addresses, then a fairly straightforward state machine, in combination with a prepared header can transmit UDP frames. This can be a reasonable solution for a quick hack on a lab.

For local networks it is also reasonably safe to omit the UDP checksum. This can be done by setting it to an all-zeroes value. By doing so, you can avoid making an extra pass over the data.

However, if you need things like ARP, DHCP or IP routing, using a Microblaze (or another core of your choice) would make more sense.

Reply to
Arlet Ottens

Actually, you can calculate the CRC on the fly because it is transmitted last.

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Reply to
Nico Coesel

The Ethernet layer CRC-32 is transmitted last, but the UDP checksum is in the header.

Beware that omitting the UDP checksum removes protection against data corruption inside the FPGA, e.g. a bug in the transmit path before the CRC-32 is applied.

Reply to
Arlet Ottens

You can do this a number of ways, but the easiest would be to use a processor based subsystem. Build a system using BSB with MicroBlaze + ethernet. Add lwIP for a TCP/UDP software stack.

The right solution would depend on your application ofcourse.

Reply to
Siva Velusamy

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