Need architecture for usb to usb bridge

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Meeting Hi-Speed would be difficult. But you can use a host MCU and bit-bang a device port, or use two MCUs. What are you going to do with the massive data? Buffering would be a problem, beyond simple search or replace operations.

Use two processors and make them talk to each other. There's a bazzilion ways to do this. Four that I can suggest, in more or less rising order of speed, expense and difficulty, are: they can talk using asynchronous serial, synchronous serial, parallel port w/handshake, or dual-port memory.

And if you look closely, I suspect you'll find that hardly any of those can handle a 480 Mbps link, much less 2 ports running at that kind of speed. A CPU needs to be mighty fast to do anything meaningful on 60 MBytes of data per second. You're looking at a job for a several-hundred-MHz bulldozer of a CPU.

OTOH there are not that many USB peripherals that actually use the maximum available USB 2.0 bandwidth (which is effectively quite a bit lower than 60 MBytes per second due to the way USB works). That being said you do need fairly powerful hardware for this project to be able to do anything useful without slowing down things too much.

He does have his sights set exactly on the one class of USB devices that rather routinely does, though: mass storage devices. USB memory sticks often don't reach that ceiling, granted. But external USB harddrives will.

Net average bandwith is indeed lower. But his device will have to cope with peak bandwidth, and still have to be able to manage the SW side of the USB protocol, too. What's gained by having a USB controller core taking care of much of the low-level stuff, will be compensated by the CPU having to deal with all the high-level protocol overhead of USB.

In a nutshell: host-side USB is _hard_; and hi-speed twin USB considerably more so. You're expected to have a full-blown PC or something rather much like it for that kind of stunt.

I think you might be able to accomplish something with one of the TI OMAP chips having both host and device interfaces. As others have pointed out its going to be very hard to do much processing at full USB bandwidth, but you might find you could go fast enough for your application.

I'm not sure if it's possible to use both USB ports at the same time on the Beagle Board OMAP evaluation board - they had some problems on some versions with one of the USB ports and I think in some cases they just removed it.

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I cannot see why you would need a bridge device (host and slave/device)=20 for mass storage device.

If the problem is file formats then write a driver for your file format=20 or even a special mass storage device driver that translates the data. =20

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For his application that has been loosely described as a bridge=20

Storage ---> Bridge ---> host

Why not plug the device straight into the host?

That needs to be understood first.

--=20 Paul Carpenter | snipped-for-privacy@pcserviceselectronics.co.uk PC Services Timing Diagram Font GNU H8 - compiler & Renesas H8/H8S/H8 Tiny For those web sites you hate

I'm betting he wants to do something like real time virus scanning, or whole disk encryption, and to do it in a bridge device because he doesn't trust or isn't allowed to modify the host PC operating system.

Thanks for all the input. To clarify a few points discussed, I will provide some more detail.

Logic The logic is very simple filtering. The minimum requirement is write blocking (making a device act as if it is read only). Beyond this, more fine grained filtering is desirable. Filtering accurately describes all of the current goals. However follow on projects could explore other functions.

Why needed The previous post has it correct. The PC cannot be trusted.

Speed Requirement As already mentioned, using mass storage means the bandwidth requirement is not a gross overstatement. The minimum requirement is to support high end USB flash drives. It is a goal to support external USB hard drives. I termed the requirement at hi-speed because USB full-speed is not adequate. I would say that 240 mbps meets the minimum requirement. However, my guess is that if I can reach that lofty speed on hi-speed rated hardware, then I can probably achieve a bandwidth close to the experienced rates on directly connected external USB hard drives.

I think you'll be well into FPGA territory if you don't want to slow anythning down, especially as micros with teh USB IO performance will likely come with a ton of other peripherals you don't need but will be paying for.

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To give you some idea of what's necessary. The new Atmel SAM3U {ARM M3 cortex @ 96Mhz} supports hi-speed usb device. You will need this class or better for host,

I would strongly recommend you reflect that idea back to its source for clarification. USB sticks in the early days had write-protect switches. Somehow this feature seems to have become uncommon, but I still think you would be a lot better off acquiring some of those instead of doing your own stunt for this.

If you expect open-ended requirement changes like that already, the device you're talking about will for all practical intents and purposed end up being a full-blown PC. Nothing much short of that will have the spare CPU power to handle such infinite variety.

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If he can dictate the hardware selections, building the flash drives with write protection is still cheaper and easier than this usb bridge solution.

Yes, but thanks to things like the smartphone market, PC-class functionality is turning up in highly integrated embedded multi-chip modules.

Be careful, such a switch could be a soft-switch where the driver is responsible for the actual write-protection.

If simple 'filtering' is what's required, I wonder if that can be done without implementing a full host USB stack. Normally the host talks to the target mass storage device directly. But if the host tries to write data blocks, the filter intercepts the write command, doesn't pass it on to the device but returns an error result instead.

Obviously it'll be more complex than that (effectively it's buffering and changing packets on the wire, through several layers of abstraction) but that would make it seem more like a slave device rather than a host. The big question is whether tampering with the results like this will confuse hosts or devices, and if you can do it without upsetting the protocol.

This would be FPGA territory, but if successful perhaps less work than a full host controller.

If you control the devices, as someone mentioned it may be easier to use your own writeproof USB drive instead. If you can't buy one, perhaps implement write protection for ATA - where doing it is much simpler - and then you could put this between a USB-ATA bridge and a hard drive or CompactFlash card. Or perhaps a further ATA-SATA or ATA-SD card bridge (either as a chip you integrate or a commercial module).

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Hmm, how about instead of filtering out the writes, changing their destination address to something impossible? Then the mass storage device would do the complaining, and know it had hopefully taking care of any synchronization issues.