Timing Diagrams

Dec 07, 2005 12 Replies

Happy Holidays!



Where can I find info on timing diagrams? I would like to learn them because I am trying to learn PIC programming and also I2C bus, but I am confuse with timing diagrams.



Any help?



Thanks!



Timing diagrams show the relationships required between various signals (when in a datasheet) for something to work. There are specific timing statements such as 'setup time' (the amount of time data must be stable before an active clock edge) and 'hold time' (the amount of time a signal must remain stable after a valid clock edge).

They really aren't difficult to understand at all.

Cheers

PeteS

Hello PeteS,

Thanks much for the kind reply! Do you know of a website with pictures so I can understand more?

Hello,

I have that document and the timing diagrams are Greek to me -- for now. For instance, I don't understand Figure 4 very well especially when the timing diagrams "cross" each other. Can you explain? Thanks!

Nice public email address.

You might want to review the I2C spec:

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Think of them as being like what you'd expect to see on a scope if you probed the pins.

Graham

The 'cross' as you call it on SDA, the serial data line, indicates where the data state is meant ' allowed to change ( if it needs to ). See the text note underneath and the relationship to SCL, the serial clock. I.e. data shouldn't change when SCL is high.

Graham

Well, it's a chart of what happens when. The X axis is time, as if you were timing a race, and the Y axis is the states of various signals along that time-line.

What part is it that you're having trouble with?

Thanks, Rich

Think of them as, a stack of a graphs of voltage against time you'll need to use a fixed pitch font to read the rest of this courier is a good choice.

_____ ____ ____ ____ \\ / \\/ \\/ \\________/\\____/\\____/

voltage ||voltage ||high||high|| high is high ||is low || or || or || || ||low ||low || || || || || ~~~~~~~~~~~~~~~~~~~~~~~~~~ voltage is changing (or not)

_____ ______ \\ / A \\________/ | | __________ 10ms >20ms voltage B stays high for atleast 10ms after voltage A goes low voltage A stat low for atleast 20ms after voltage b goes low the rise time on voltage A is less than 5ms.

Bye. Jasen

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This article really explains timing.

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