Hello
Somehow I am not able to find in any Xilinx documentation a detail description of the FSL interface. I am especially looking for the read and write timing diagrams. Anyone knows where I can find them?
Cheers Philipp
Hello
Somehow I am not able to find in any Xilinx documentation a detail description of the FSL interface. I am especially looking for the read and write timing diagrams. Anyone knows where I can find them?
Cheers Philipp
It took me a while to assemble all the FSL info the first time I looked as well. Google is uncharacteristically unhelpful...
Actual Waveforms are in the FSL pcore documentation:
The MicroBlaze Processor Reference Guide discusses the FSL assembly instructions:
The Microblaze Standalone Board Support Package has C macros for each of the FSL assembly instructions:
XAPP529: Connecting Customized IP to the MicroBlaze Soft Processor Using the Fast Simplex Link (FSL) Channel:
In EDK 7.1 (not sure about previous versions), the Create and Import Peripheral Wizard provides nice FSL starter file support:
Paul
Philipp Grabher wrote:
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