Software tools for architectural diagrams and for timing diagram entry?

Yes

I spent several months preparing a paper (on a pipelined processor) and docs trying to use relatively free software Windows like Open Office but the graphics really just were awefull.

I remembered how much fun I had on the old Mac 20yrs ago with MacDraw so I dug up Canvas by deneba who also did a Windows version starting around early 90s.

Basically its a CAD program as easy to use as the old MacDraw but much more powerful, it doesn't do the links thing like Visio or OO but after using OO version of that I got sick of that feature in a hurry.

In canvas when you need to make up arrays it figures how to auto step & repeat, many Win programs copy right on top of same, what good is that.

It allows hierarchy grouping ungrouping etc.

Its stipple pattern choices are very dated though right out of MacPaint

You can control your grid and resolutions.

Its follows good interface design and installs by just dragging (old version).

It starts in

Unless there is a paying audience for a design review, I just use a pen and notebook to block things out then get on with the design and simulation work.

Most synthesis tools can draw block diagrams for you once the top entities/modules are complete.

See:

But consider getting a working simulation before handing out data sheets.

-- Mike Treseler

Yes I did a lot of that. I am trying to get away from it as much as possible, paying audience or not. If you do the diagram on a computer, its already documented. Then its easy to change the design, keep track of versions, copy one block to another design, reuse your blocks. Major time saver even with a moderately user-friendly program.

Yes, but the idea is to have a block diagram before touching VHDL/Verilog.

Thanks for the TimingDesigner link! (No, I am not actually designing a datasheet, I am designing multithreaded process)