Hi,
I'm still a bit confused between lock range and capture range regarding PLLs. I have the following definition:
- lock range - the range of frequencies that a PLL can maintain a lock on the input signal
- capture range - the range of frequencies that a PLL can acquire lock with an input signal... the capture range is never greater than the lock range.
Am I right with the following?
- once a PLL locks to a certain frequency, the variation frequency from which the input signal swings is in the lock range if the difference DC component is still the same as to when the input signal is equal to the locked frequency.
- say the lock range is up to 2kHz and the locked frequency is 5kHz, then the PLL can still maintain a lock if the input signal swings 5kHz
+/- 2kHz.??
Thanks!