Hi All,
I have a register that name is "PLL Lock detector"
I think it is a register representing the PLL locks the clock yet or not, am I right?
and we use PLL to lock frequency, how other things know the PLL lock yet or not? detect its variation value?
Thank you very much!
BR/ Boki.
What is commonly done is look at the output of a flip-flop phase comparator and if you're not in phase "most of the time" (subject to threshold), then you're not locked.
When you're locked, the output of the phase comparator will be occasional blips of correction. When you're not in lock, you get the beat frequencies of the divided-down VCO with the reference.
Many PLL chips use an off-chip capacitor to set the lock-detect threshold. While the capacitor is important in setting the threshold, this is not something that will help you measure phase noise 80dB down and 50Hz away from the fundamental :-).
Look at the NE565 or CD4046 datasheets for some info (and especially as you have no datasheets on your parts?)
Tim.
I think module provider can't provide enough information, because they are not chip designer.
btw, thanks for your > snipped-for-privacy@ms21.h> > Hi All,
You need to read that register with something and provide a hardware signal if that's what the rest of your circuitry requires.
Ken
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