Hi,
I am working on phase noise simulations of pll blocks at transistor level at 2.4ghz in tsmc18rf with spectre simulator using cadence. For clock divider, the pss(periodic steady state) analysis does not converge. it stops after 20 (or max period) iterations. also, jitter and phase noise analysis for phase frequency detector also does not converge. it takes long time to run and then finally reports convergence problems. i tried following the suggestions given in cadence documentation and n the output log, but to no avail. how to set the different parameters tolerances for reltol,abstol,maxsteps,ltration,steadystate ratio. i tried loosening some of them, still it did not yield results. I tried the following settings" for pss: fundmental tone is 2.4ghz large signal input beat period: 0.41666n or 0.83333n (tried both) no. of harmonics: 20 accuracy settings: conservative, tsatb =800n i have not highlighed oscillator as this is a driven circuit. in options, maxstep is 10ps. steadyratio=1, integration method: method is gear2only and tsabmethod =gear2only, highorder=yes, psratio=1,maxorder=12. for pnoise analysis, sweep type=relative, relative harmonic=1 or 100k, freq range = 1k to 100M sweep type = logarithmic, points per decade =5 max. sidebands = 10 or 20(tried both) output = voltage input = none, options: gear_order=3 am i making any mistake in the above settings/analysis?
is there any documentation or info on this....any suggestions are highly welcome.
thanks srini