PLL confusion

I'm trying to learn about PLL circuits and admittedly I'm a newbie and therefore confused as usual. Why is the phase detector portion of a phase lock loop (analog) called "phase detector" when what it really detects is a difference in frequency. That is two waveforms with different frequencies cannot have any fixed phase relationship. As I understand it putting two identical frequencies that are some fixed phase apart will not give any signal out of the phase detector, only two different frequencies will give a dc current out. I've obviously got something muddled up here ,what is it? thanks jim

"jim" schreef in bericht news: snipped-for-privacy@4ax.com...

Phase and frequency are tightly related. Nevertheless, the output of a phase detector is related to the phasedifference of both inputsignals regardless what frequencies are used. When both frequencies are not equal (and not otherwise related) the output of the phase detector will vary over time. As you already know, these variations are used to control a VCO which makes one input move to the point that the VCO is locked on the other signal.

petrus bitbyter

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This is not true. A 5 and 10 Hz signal that start off in phase, will be in phase after one cycle of the 5 Hz wave, for example.

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Best Regards,
Mike

I'm doubtful if 'phase' is the right word too. the phase difference of two non - same frequencies increases over time and never repeats.

the idea is to compare the 2 signals which will produce a reference that will force a VCO (voltage control osc) to bias it self, there by adjusting one of the 2 signals to properly get in phase (in timing) with the master reference. the master ref is generally fixed, you use dividers of the VCO to scale it, so that the results will match the master ref. the end results is, the VCO increasing in Freq. the phase detector will produce the signal due to the 2 signals not being phased. using something like an XOR gate circuit, there by pumping in the two references, one from the Master ref and the other from the output of the divider, will produce an sharp response of an out of phase signal there by creating biasing to push the VCO OSC up in freq until the two match and near match. normally the VCO is aligned in free run to pull it self below the minimum requirement. that is, with the bias voltage below what the Phase Detector will produce. a cheap PLL will use a simple charge pump decoupling circuit to hold the VCO. good ones use DAC with a small charge pump for a narrow window. etc..

jim wrote:

Simply stated: A pll generates a frequency related to a measured input-frequency The relation might be 1-to-1, OR, if in the feedback circuit a divider is built in the relation will be N-to-1 (a typical pll-based frequency-multiplier)

Even if the measured frequency and the generated frequency are say 0.000001% un-equal, you WILL get a phase-difference over time between pll-generator and input The phase detector will detect this difference, and charge/discgharge a filter circuit to set the vco of the pll tot the correct "phase" Result : Since phase and frequency are so tightly related, the pll will adjust not only phase, but also frequency

For specific cases:-)

In general cases the phase between two signals is not definable at all.

Kevin Aylward snipped-for-privacy@anasoft.co.uk

SuperSpice, a very affordable Mixed-Mode Windows Simulator with Schematic Capture, Waveform Display, FFT's and Filter Design.

I think we're talking about the kind of periodic sigs where it is.

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Best Regards,
Mike

But not in general:-)

If f1 is not rational to f2, phase can't be defined, even if periodic.

Kevin Aylward snipped-for-privacy@anasoft.co.uk

SuperSpice, a very affordable Mixed-Mode Windows Simulator with Schematic Capture, Waveform Display, FFT's and Filter Design.

If there's just some DC gain from the pd output to the vco input (maybe just g=1, even), the loop will usually settle with some non-zero pd output, namely the voltage necessary to pull the vco to the target frequency. Since it almost always takes some non-zero dc voltage to pull the vco to the target, there must be a steady-state phase error, so the waveforms are locked in frequency but have some fixed phase offset, whatever it takes to tune the vco. This is a first-order pll.

But if you add an integrator in the path from the phase detector output to the vco input, the loop will settle at zero frequency error and zero phase error (ignoring any residual offset errors in the pd or the integrator.) The integrator will slowly creep the vco input over time such as to servo the pd output to zero. This is a second-order pll.

The vco-phase detector combination is itself mathematically an integrator - just imagine applying a small DC voltage at the vco input... the pd output will then be a ramp (although the ramp eventually folds over, but that's another story... no integrator can ramp forever!) So the type-1 servo loop is an integrator with negative feedback, which is usually very stable. The type 2 loop has *two* integrators in a feedback loop, which tends to be unstable, oscillating or ringing badly (two integrators tend to chase each others' tails, so to speak) so some additional compensation is needed to keep the lock stable.

Beyond this, a good book on pll's would be helpful. Unfortunately, many are mainly mathematical in approach, which is fine for coming to workable solutions but somewhat lacking if you want an instinctive visual feel for what's happening.

My favorite pll uses a d-type flipflop as the phase detector in a type-1 loop. It's inherently stable, but has zero phase error, because the phase detector gain is infinite. Mathematically, it's sort of a mess.

Some phase detectors (like a linear multiplier) give an output that depends on one or both input amplitudes, so loop behavior varies with input signal level (vco level is usually pretty much constant.) Most pd's don't care about input amplitude for reasonable input levels, but just compare phases; that simplifies loop analysis. An XOR gate is a nice phase detector that pretty much ignores input level. Just imagine turning either sine input into a square wave of, say, +-1 volt fixed signal level, using a comparator or some such, and then comparing phases.

John

two

Mm...... depends what you mean by 'in phase'. Can you give me a definition to mull over?

Peter

I'm pretty visually oriented so my questions come from that angle, so I'm picturing the output of a pll of two signals that are identical in frequency which will be a flat dc level. Does the whole loop then try to bring the dc level to zero or is matching frequencies enough?

I can picture the visual way to obtain phase difference of two different frequencies of equal amplitude by just drawing a horizontal line through the two waves at any amplitude and this will give the rolling phase difference. But what will be the effect on the phase detector output if one of the waves is say twice the amplitude.? If there is a difference how does the phase detector deal with this?

Thanks for all the replies btw, I've just got to get my hands on a phase detector and see for myself. jim

the feedback signal to the vco will be of such a kind so the vco adjusts its frequency (phase) to the given input for one vco it will be a digital signal, for the other it will be a dc signal of a specific magnitude

amplitudes are irrelevant - if above a given minimum of course, only a specific zero-crossing will be taken into acount usually this crossing is detected by (internal) comparators, or (if digital) square signals need to be fed

wrong It is indeed true the amplitude will be zero for both after one cycle of the

5Hz signal, and the zero crossing will have the same direction BUT For a 5 and 10Hz signal that start off in phase the 5Hz signal will be lagging a full 360deg (or 2*pi rad) after one cycle with respect to the 10Hz signal. It's PHASE to be considered, remember...

You mean a division resulting in a remainder of zero, that simple, eh? Sounds right to me.

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Best Regards,
Mike

You both got me. The zero crosses don't indicate phase, they just coincide at integral multiples of full cycle phase differences.

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Best Regards,
Mike

of

the

10Hz

One can take ANY reference point on two signals (eg 20deg after a positive zero crossing of a single cycle or something like that), but easiest is to take zero crossing of course. When taking a reference for phase it's good practice to take something both signals DO have, in this case zero crossing. This way one can compare phases between any form of repetitive signals of whatever amplitude since it's phase we are interested in... As fo the "horizontal line" : adjust your scope (or other visualisation means) so the displayed amplitude of both is equal, since that's not what we are interested in measuring

Ok, I'm just about there,so you're saying that amplitude variation has no effect on the phase relationships?