I can not parse what you intend by these strings of characters.
Vbe, the forward biased base to emitter junction is not a fixed voltage, but varies over a small range for the normal range of input currents between something like .5 and .7 volts. So the simplifying assumption is often that it is about .6 volts. If the input voltage (Vin) is 5 volts, the voltage across the base resistor,Rb, is roughly 5-.6=4.4 volts. So the base current is roughly 4.4/Rb. The current gain of the transistor falls dramatically as the collector voltage gets pulled down lower than the base voltage, but the upper limit on the collector current is the current gain times the base current. So the collector current must be equal to or less than gain * (Vin-Vbe) /Rb.
When using the transistor as an inverting buffer (NOT gate) you're supposed to drive it into saturation, so there's no point using the gain of the transistor to try to calculate collector current. Collector current is determined, in effect, by the collector resistor; voltage across the collector-emitter junction is minimal. You're using the transistor as a switch, it's only ever either ON or OFF.
Not sure if that addresses your question, which is kind of hard to follow, but I did notice you used a gain calculation.
*) the base of a transistor T is at voltage level V[B2] and is connected to a resistor with resistance R[B]. the other end of this resistor is at voltage level V[B1]
*) the collector of T is at voltage level V[C2] and is connected to a resistor with resistance R[C]. the other end of this resistor is at voltage level V[C1]
*) the emitter of T is at voltage level zero.
hence the V[in] and V[out] of the webpage are respectively my V[B1] and V[C2]. this is the best i can do by way of a diagram. sorry.
you seem to say that, to a decent approximation, V[be] = ( V[B2] - > ) = V[B2] is indeed fixed; specifically V[B2] = 0.6. consequently, if V[B1] = 5 then
is this (with standard disclaimers about how a model is just a model) right so far? here are a couple other points you could clarify if you don't mind:
i)
the normal range of input currents.
by "input current" you mean "base current", right? can you give me an idea what is the "normal" range of input currents? (qualitative conditions, if they exist, would likely be more helpful to me at this point than quantitative ones.)
ii)
voltage gets pulled down lower than the base voltage.
this constitutes a different biasing condition, right?
Make that a less than or equal to. If the collector to emitter voltage approaches zero, the gain heads toward zero, so if this I(c) calculation shows a drop across R(C) greater than 5 volts, you just assume the collector to emitter voltage is less than .6 volts (the transistor is saturated on).
All that assumes that the transistor does not get saturated on by this collector current through the collector resistor. But it wouldn't be a very good not gate if the transistor dropped a significant part of the supply and the collector resistor only dropped a part of it.
the normal
Right.
Right.
The transistor gain curve versus collector current (at some fixed small voltage collector to emitter , like 5 volts, is often shown on the data sheet. There us usually some collector current that exhibits the highest point on the gain curve. For all collector currents with gain at least half of that peak gain current point, the base to emitter voltage will vary from about .5 to .7 volts. This is about the normal linear gain range of that particular transistor. Here is an example data sheet pulled at random to talk about:
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Note figure 13, the current gain curve, with 1 volt collector to emitter (in this case, since this is a transistor designed for saturated switching, like your not gate). At 25C, the peak gain (normalized to a multiplier of
1 on this graph) occurs at about 10 mA of collector current. It falls to .5 at about 50 mA. The low current end of the scale doesn't go low enough to find the low current equivalent gain point. But you can pretty well assume that if the transistor still has a little collector voltage, its base to emitter drop will be in the range I have said. Once the collector voltage falls below the base voltage, the base voltage rises from the high base current it takes to drive the collector hard into saturation. Figure 13 shows the actual base to emitter voltage at various saturated collector currents with the base current driven all the way to 1/10th of the collector current, effectively saturating the transistor till the current gain falls to 10. There is also a curve with the collector voltage forced to 1 volt, which drops the base voltage a little. But 1 volt is low enough that the current gain is already falling a little, so the base voltage is on the high end of what I have been estimating. Saturated switching needs extra base to emitter voltage, compared to linear amplification applications.
Right. The gain is a process of diffusion of charges that are drifting along a very thin base layer, and if they wobble over into the reverse biased base to collector junction, the electric field of this reverse biased junction efficiently sweeps those charge carriers out to the collector terminal. Once that junction becomes forward biased, the internal electric field tends to head the charge carriers in the junction back toward the base, so they show up as increased base current, instead of increased collector current, hence, lower current gain.
Yes. That bias condition is called "saturated on" or just saturated.
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