The 1f0 and 170 represent "port numbers" in a PC or such. If you ask the question in the context of an embedded system (which I asume here) these numbers are completely without any meaning. The data register is at address '0' and is also mirrored at address 8 & 9 relative to the place in the address room you operate the CF in. Wether you call this "ofset" or "address" depends on how you build the address (i.e. if you bitbang it, if you hook it up to a potentially present address & databus etc.).
Right. But the 170h address is for the slave (=second) device on the IDE bus. The offset is simply the offset from the base address. So offset 8 is simply
1F8h. Why this is done: you refer to all registers with a construct like BASE+1 or BASE+2, so you only have to change one single definition of BASE to change your code from accessing the master to the slave device.
These three offsets actually point to different I/O addresses of the IDE interface. Liek I explained, 1F0 is the base, so with the offsets 0, 8 and 9 you actually address ports 1F0, 1F8 and 1F9. Each of these addresses is a different register in the IDE interface (data port, cylinder number, sector number etc.).
Here I copied the texts from the "CF+ and CompactFlash Specification Revision 2.1".
"Data Register (Address - 1F0h[170h]; Offset 0, 8, 9)" "The Data Register is a 16 bit register, and it is used to transfer data blocks between the CompactFlash Storage Card data buffer and the Host. This register overlaps the Error Register.
Table 37: Data Register Access below describes the combinations of data register access and is
provided to assist in understanding the overlapped Data Register and Error/Feature Register
rather than to attempt to define general PCMCIA word and byte access modes and operations.
See the PCMCIA PC Card Standard, for further definitions of the Card Accessing Modes for I/O
and Memory cycles.
Note: Because of the overlapped registers, PC Card modes access to the 1F1h,
171h or offset 1 are not
defined for word (-CE2 = 0 and -CE1 = 0) operations. These accesses are treated as accesses to the
Word Data Register. The duplicated registers at offsets 8 and 9 have no restrictions on the
operations that can be performed by the socket."
See it looks like the offsets 8 and 9 are copies of the offset 0, am I right?
I think what this means is that the data register can be accessed as a 16 bit word only at offset 0 and that offsets 8 and 9 can be used to individually access the high and low byte of the data register.
The company I work for is building modules to read Compact Flash Memory Cards over a serial connection ( RS232 ). All the Compact Flash driver and file system stuff is on board. You read and write files through simple "AT" commands.