New To FPGA, Program question


I am new to FPGAs and was wondering, how do fpga store the bitstream? I mean, with CPLD, I don't need any special memory chips to program them and they retain their programming, but for FPGA, I see that they seem to need some flash or prom to store the bitstream, which then loads into the FPGa. Is this the case? If so, what type of memory is used, and how do I use

Xilinx webpack to program it?



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Many mid-sized Xilinx FPGAs use serial EPROMs, most can also handle a parallel EPROM if you provide an address counter. I've been working with

5 V Spartan devices, and use Xilinx's own 17128 through 17256 and 17S20 and 17S30 serial EPROMs, which use a direct-wired connection to the FPGA. They have some 3.3 V versions that are used with the newer FPGAs that have a 3.3 V interface. This is by far the simplest setup for mid-size FPGAs such as the Spartan series.

You can't program these directly with the WebPack software. I use a Xeltek universal device programmer, and it is very good, and pretty cost effective. Xilinx does have a link on their web site to a device programmer that only supports their own PROM products, but the Xeltek is only just a little more expensive and so much more flexible.


Reply to
Jon Elson

The easiest way is to use the new platform flash PROMs for configuring the device. You put them in the JTAG scan chain and the Xilinx cables (Parrallel V3, V4 or USB) can program them



Reply to
Eli Hughes

Similar to CPLDs, there are some non-volatile FPGAs that have on-chip flash for the configuration bitstream. You might want to check out the LatticeXP or MachXO.


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Ie you must have an configuration memory on the board? (be it sram or whatever.)

If yes, then why is it so..?, fpga wants data at a very high datarate ..?

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The FPGA stores its configuration in SRAM memory cells. These are part of the FPGA, so you don't need external SRAM.

But, since it's RAM, the FPGA doesn't keep the configuration memory contents if you disconnect the power supply. That's what the mentioned (Platform)Flash chips are for - to provide the FPGA with an initial bitstream on powerup.

You can just as well power up your FPGA and load the initial configuration through JTAG.



Reply to
Enno Luebbers

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