Hi all, I am developing my first circuit board with FPGA. Trying to make a circuit board without PROM for FPGA programming so just using the FPGA, hence cutting down the cost as well for security. Planning on using the JTAG method where the bit file is used to directly program the FPGA. In this case since the FPGA needs to be programmed every time on powerup, is there a cache in the FPGA which stores the bitstream and configures the FPGA each time on powerup. Or does the bitstream need to be downloaded each time when the FPGA is powered up unlike the PROM method where the FPGA gets configured from the PROM. I couldnt find any documentation on Xilinx website for these questions. So any help with this is greatly appreciated.
Thanks & regards