Generalizations don't mean much.
-- John Larkin Highland Technology, Inc picosecond timing laser drivers and controllers jlarkin att highlandtechnology dott com http://www.highlandtechnology.com
No need to exert yourself. Just point out three or four.
-- John Larkin Highland Technology, Inc picosecond timing laser drivers and controllers jlarkin att highlandtechnology dott com http://www.highlandtechnology.com
It's a Dell XPS 8700 with the i7-4790, 8GB or RAM, NVidia GT720 graphics card and Windows 7 Professional 64-bit. That's pretty much it. And looks like they lowered the price another 100 bucks for cycber Monday. Dang ... oh well.
-- Regards, Joerg http://www.analogconsultants.com/
I'm pretty sure if you call them you can get the lower price. That's one thing Dell is good for, pre-sales support. You can always cancel this order and reorder it with today's price.
-- Rick
Especially that one!
-- Rick
Well, I just did. Wish I hadn't because I was on the phone for around
45mins. They cancelled the old order, put in a new one and now the delivery date is Dec-30 instead of mid-Dec :-(But they said the old order had a factory hold because of some parts shortage so it might have been late anyhow. And (after quite some haggling) they finally honored at least one of the $50 coupons.
Hint to others: Some coupons have "10000 redemption" limits and such in the fine print, already exceeded, and it seems they leave them in there anyhow but then they don't work.
-- Regards, Joerg http://www.analogconsultants.com/
I placed an order, was $999, including the 32GB SSD option. Cheap enough! It insisted on Windows 8.1, so I gave up, we're all going to Windows 10 shortly anyway. I couldn't tell, there was no place to enter the B?CK0N1KJMTH1P cyber-Monday code. The on-line chat lady said "Coupons can only be applied on selected systems." The session has ended!, it said. OK, good enough.
I made my present pair of computers from bits and pieces 5 years ago: ASUS mobo, i7 processor, Windows 7 ultimate. (That combo wasn't available commercially at the time.)
It's been a workhorse, but I really need better, faster SPICE sims, faster searches through 250MB Acrobat files, etc. Dunno about the i7-4790 from my present i7, but tell me it's gonna be way better, right, Joerg? :-))
--
Thanks,
- Win
Oops, Joerg, I'm beginning to think I made a big mistake. And you too. We can sell these Dells on eBay, and go the custom route. Let's get together on the phone, and work out a decent machine for ourselves, one that has multiple PCIe slots, etc. A proper power supply and cooling fans. Whaddya say? Contact me on the email back-channel.
--
Thanks,
- Win
What is better about the new machine? More memory? Is the processor really much faster?
-- Rick
But there's a neat fix, so I'm back on track with my bang-bang loop.
Rob wants to do the phase comparison at 10 MHz. He came up with a clever way to make exactly 10M from 155.52 MHz, in the FPGA: make a mod 1944 counter and add 125 to it every tick of the 155M clock. The MSB is a square wave at exactly 10M, but of course the edges are still quantized to the 155 clock. So there's edge jitter on the MSB, the
10MHz output. He can do a clever DDR output cell thing and some logic to cut the quantization in half, which jitters the 10 MHz edges by about 3 ns p-p. Call this the sorta10 signal.The spectrum of the sorta10 signal has a big 10 MHz line, the usual odd harmonics, and spurs every 160 KHz from 0 on up.
Sorta10 (preferably resynchronized to 155MHz in ECL) would then go into an XOR phase detector against the 10MHz reference input, then an analog loop filter into the VCXO. Or maybe use a legit phase detector, like the MC100EP140. If we can figure out how it works.
Now we have to figure out what all those thousands of spurs, mixed and lowpassed filtered, do to the the overall loop jitter. And we still have the problem that the PD output goes rail-to-rail over 50 ns of phase error, so we need analog accuracy of something like 1 part in
20,000 from an XOR gate running at 10 MHz.The bang-bang PD output goes rail-to-rail over picoseconds of phase error.
Maybe we'll build both and have a test-off.
-- John Larkin Highland Technology, Inc picosecond timing laser drivers and controllers jlarkin att highlandtechnology dott com http://www.highlandtechnology.com
It
who
Now that does sound interesting. I would like to see the results of that.
?-)
It'd be way better if you didn't use Acrobat. Worst PDF tools ever.
o
This is the fractional-n approach, which was suggested here earlier.
The next step is to dump the bang-bang detector and replace it with an excl usive-OR or any of the sequential phase detectors that give a reliably line ar phase-to-output characteristic with phase errors of up to 6nsec.
Shouldn't be a problem. The original E.A.Faulkner and D.W.Harding long-tail ed pair phase detector - J.Sci. Instrum. Vol 43 page 97 (1966)was close to that good, and cascoding a matched monolithic pair of transistors in the lo ng-tailed pair would have made it appreciably better.
In any event minor non-linearities would create a problem if they were symm etrical about zero phase error, which is likely with a long-tailed pair.
E.A.Faulkner and J.B. Grimbley published an "improved" version in Electroni c Engineering volume 39, page 565 (1967) but IIRR, it wasn't improved in an y way you would have found helpful.
Jim Thompson probably did rather better, and Analog Devices has also design ed at least one phase-detector IC - I suspect that Barrie Gilbert might hav e been involved, but can't be sure.
does talk about it's advantages in fractional-n synthesisers, though he did n't use it.
Signs of progress ....
-- Bill Sloman, Sydney
I think this comment speaks volumes about how John perceives himself and the rest of the world.
-- Rick
Well, I do have to use Acrobat files, .pdf files that is, but I don't have to use the Acrobat program, I suppose. What do you suggest I use instead?
--
Thanks,
- Win
On a sunny day (Mon, 1 Dec 2014 17:41:38 -0000) it happened "Kevin Aylward" wrote in :
Well, he only had _one_ first boss no?
On a sunny day (Mon, 1 Dec 2014 05:31:05 -0800 (PST)) it happened Bill Sloman wrote in :
' Yes I tightened all those screws in those alu cans, but it is still not working'.
OK, the Intel Core i7-4790 3.6GHz 1150 processor does look like a damn good choice for the CPU. And at $250 from our local Microcenter store, it'd be a significant cost hit in any system one might want to throw together. Maybe the K version would be better, but it seems to be out of stock.
--
Thanks,
- Win
Here is the result of a simulation I did (from when I posted in the original thread). It shows the instantaneous jitter of each rising edge of the "sorta10" signal, in fs. It covers 4 cycles of the jitter. There is also a small arbitrary steady state offset that I didn't bother to remove in my sim.
Feel free to plot, FFT, etc.
If there's sufficient interest, I could post the behavioural VHDL source. I could also modify it to includes Rob's DDR improvement. It's a trivial modification, since the underlying fracn divider model already implements that feature.
Regards, Allan
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Seems made for an early/late gate: Clock a DFF with 10 and use it to sample sorta10. That goes from 0 to VDD in 6 ns instead of 50, so your analogue stability is relaxed to 300 ppm instead of 50.
Cheers
Phil Hobbs
-- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net
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