that PLL again

Yup. Now you've given away your age, too :-)

I think it never will happen, other than maybe very few research apps in academia. One reason is probably be the short market lifetime of graphics chips and maybe the lack of (published) hardware standards but there must be other reasons.

Sure, but essentially I am happy with the mobo graphic of the current PC. Except it cannot drive two 27" monitors. Speed is no concern because I never watch movies or much other moving content. The new monitor says

It's been awhile, but I recall once running a nearly two day simulation on a complex chip design.

Now-a-days mostly minutes for specific cells, a few hours for the whole chip PER CORNER >:-} ...Jim Thompson

"Iteration" is not design. Simulations are for proving that you are right. ...Jim Thompson

You have probably seen this Sprouts recipe but it's one we like to cook.

But I only use 2c of chicken stock instead of the 2 1/2 in the recipe

These pecan pie bites are always a bit hit, easy to make

On a sunny day (Sat, 29 Nov 2014 09:10:47 -0700) it happened Jim Thompson wrote in :

There is only _one_way to prove you are right, and that is build it.

Else it is like glowball worming, is your model right? And is your data right?

Seems to me in case of PLL building the real thing and testing it is 100x faster...

Too many slimulations, NASA gives itself awards for it. In reality they cannot ven get a person a few miles up anymore, in spite of all that tronics that was not there in the Apollos.

WTF spend a fortune on GPU cards to run something for ages that you can test with a soldering iron and 50$ parts in an hour? And then you REALLY have something.

It must be a demonrat plot, them slimulations.

Oh. I'm not always at my peak mental performance at 2:30AM. Got up to do some prep for a massive winter storm that never actually made it here. Even our 6-hour weather forcasts are often completely wrong. The sun is shining, computer models be damned.

The other bummer about Spice is that neither time-domain analysis nor frequenct-domain can nail an oscillator frequency to ppm or ppb precision. In my little time-domain sim, I XORd the PLL output against a reference frequency, which at least looks nice. Even double floats pile up errors over billions of steps. Huge FFTs have their own problems.

Spicing this is thought-provoking and not much else. We plan to lay out a test board, with various XOs and such, and see how it works. Most of the loop will be digital, so it will have an FPGA to gobble up the BB flop output, and drive the VCXO with a DAC. In the time-critical path, the entire PLL logic will be the one EclipsPlus flop, and the DAC.

We can make a frequency counter (count the 155 MHz, timebase from the

There are C compilers for massive-parallel use of the Nvidia boards. Seems like Spice is an app that might be parallelized somehow.

Wildly nonlinear systems are not often amenable to analytic solutions, much less optimization of topology and values. My little PLL is simple enough that it can be analyzed on paper, but simulating it made me think about some issues, and learn a little more about Spice, and the screen shots will look nice in a design review document.

Anything that results in a good product is "design."

I am still doubtful. If there really was a potential for even a single-digit factor speed increase some of the commercial simulator vendors would have done it. People go to great lengths and substantial expense to obtain simulator speed. I mainly ordered the new PC because due to the i7-4790 processor it'll result in (hopefully) a 3-4x simulation speed increase. For anything else I am perfectly happy with the PC I've got now.

OK, but we prefer light corn syrup. The dark stuff clashes with the pecan flavor.

We have to buy several different long-lead VCXOs, design and lay out a multilayer PC board studded with SMA test connectors, and program an FPGA before we can seriously test this loop. So a little futzing with Spice isn't a bad idea.

For looking at the detailed implications of design choices ...

The solar system is non-linear and chaotic, but analytic solutions for planetary orbits - such as Kepler's - are never-the-less useful.

Depends what you bother to look at. If you could bear to simulate system with linear phase detector (it only has to be linear in the range

Not quite enough of the potential issues.

Whereas persisting in a silly choice because you made it work once is non-design, aka tinkering.

Sounds to me the spice files are not being compiled down to a lower level when ran.. I would think converting the files to at least a token type run would be better than reading directly from raw text over and over..This would also include converting all float numbers into their binary equals in the token scripts so that the FPU can directly act on them.

also, the use of a RAM disk source of input/output files would speed things up greatly.

Jamie

Maybe in 1984, but in 2014 most disk drives buffer full tracks, into the onboard RAM (usually in the 8MB to 64 MB range), and I'd expect an OS to map files both into RAM (several GB) and into cache (maybe 2 MB). A 'long' Spice file is still only 0.01 MB

Simulating 2 milliseconds of PLL, at 50 ps time steps, generated about

You need some good, hearty, Texas pecans :)

Have you any actually idea in the time it take to solve 10,000 by 10,000 nonlinear matrixes for 100,000s of points ?

Kevin Aylward

The % of analytically solvable nonlinear equations, of all equations, is

Its impossible to "fully" analyse any realistic PLL with pen and paper. The only pseudo exception would be Steven Hawking, but he don't use pen and paper.

Kevin Aylward