There was a discussion of this on S.E.D. quite recently with one of it's denizens successfully getting a board with gold fingers fabricated at a very reasonable price.
X-Posted to s.e.d. for comments
Cheers
PeteS
There was a discussion of this on S.E.D. quite recently with one of it's denizens successfully getting a board with gold fingers fabricated at a very reasonable price.
X-Posted to s.e.d. for comments
Cheers
PeteS
PeteS posted:
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Richard wrote:
I designed a Q-bus interface card about 16 years ago using a CPLD for decoding logic and another CPLD for board functions -- both written in ABEL. I used DEC's ChipKit for logic buffering to the bus itself. The physical dimensions of the board fingers came from one of DEC's manuals.
Alas, it was 16 years ago and 2 companies ago, so I don't have much to offer in the way of code. But, it has been done before, so it can be done again! As for the logic interface, there are so many logic families that modern FPGA's I/O can be programmed for, I'm sure something will match the characteristics of the Q-bus (Unibus), then you don't need the ChipKit.
Cheers Tom
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